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Publications of Author

1. Kazuo Sakiyama, Lejla Batina, Bart Preneel, Ingrid Verbauwhede
   Superscalar Coprocessor for High-Speed Curve-Based Cryptography. [Citation Graph (0, 0)][DBLP]
   CHES, 2006, pp:415-429 [Conf]
   
2. David Hwang, Bo-Cheng Lai, Patrick Schaumont, Kazuo Sakiyama, Yi Fan, Shenglin Yang, Alireza Hodjat, Ingrid Verbauwhede
   Design flow for HW / SW acceleration transparency in the thumbpod secure embedded system. [Citation Graph (0, 0)][DBLP]
   DAC, 2003, pp:60-65 [Conf]
   
3. Lejla Batina, Nele Mentens, Kazuo Sakiyama, Bart Preneel, Ingrid Verbauwhede
   Low-Cost Elliptic Curve Cryptography for Wireless Sensor Networks. [Citation Graph (0, 0)][DBLP]
   ESAS, 2006, pp:6-17 [Conf]
   
4. Kazuo Sakiyama, Elke De Mulder, Bart Preneel, Ingrid Verbauwhede
   Side-channel resistant system-level design flow for public-key cryptography. [Citation Graph (0, 0)][DBLP]
   ACM Great Lakes Symposium on VLSI, 2007, pp:144-147 [Conf]
   
5. Nele Mentens, Kazuo Sakiyama, Bart Preneel, Ingrid Verbauwhede
   Efficient pipelining for modular multiplication architectures in prime fields. [Citation Graph (0, 0)][DBLP]
   ACM Great Lakes Symposium on VLSI, 2007, pp:534-539 [Conf]
   
6. Patrick Schaumont, Kazuo Sakiyama, Alireza Hodjat, Ingrid Verbauwhede
   Embedded Software Integration for Coarse-Grain Reconfigurable Systems. [Citation Graph (0, 0)][DBLP]
   IPDPS, 2004, pp:- [Conf]
   
7. Kazuo Sakiyama, Patrick Schaumont, David Hwang, Ingrid Verbauwhede
   Teaching Trade-offs in System-level Design Methodologies. [Citation Graph (0, 0)][DBLP]
   MSE, 2003, pp:62-53 [Conf]
   
8. Nele Mentens, Kazuo Sakiyama, Lejla Batina, Ingrid Verbauwhede, Bart Preneel
   Fpga-Oriented Secure Data Path Design: Implementation of a Public Key Coprocessor. [Citation Graph (0, 0)][DBLP]
   FPL, 2006, pp:1-6 [Conf]
   
9. Lejla Batina, Alireza Hodjat, David Hwang, Kazuo Sakiyama, Ingrid Verbauwhede
   Reconfigurable Architectures for Curve-Based Cryptography on Embedded Micro-Controllers. [Citation Graph (0, 0)][DBLP]
   FPL, 2006, pp:1-4 [Conf]
   
10. Lejla Batina, Nele Mentens, Kazuo Sakiyama, Bart Preneel, Ingrid Verbauwhede
    Public-Key Cryptography on the Top of a Needle. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2007, pp:1831-1834 [Conf]
    
11. Kazuo Sakiyama, Bart Preneel, Ingrid Verbauwhede
    A fast dual-field modular arithmetic logic unit and its hardware implementation. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:- [Conf]
    
12. Nele Mentens, Kazuo Sakiyama, Lejla Batina, Bart Preneel, Ingrid Verbauwhede
    A Side-channel Attack Resistant Programmable PKC Coprocessor for Embedded Applications. [Citation Graph (0, 0)][DBLP]
    ICSAMOS, 2007, pp:194-200 [Conf]
    
13. Kazuo Sakiyama, Nele Mentens, Lejla Batina, Bart Preneel, Ingrid Verbauwhede
    Reconfigurable Modular Arithmetic Logic Unit for High-Performance Public-Key Cryptosystems. [Citation Graph (0, 0)][DBLP]
    ARC, 2006, pp:347-357 [Conf]
    
14. Kazuo Sakiyama, Lejla Batina, Bart Preneel, Ingrid Verbauwhede
    Multicore Curve-Based Cryptoprocessor with Reconfigurable Modular Arithmetic Logic Units over GF(2ⁿ). [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2007, v:56, n:9, pp:1269-1282 [Journal]
    
15. Kazuo Sakiyama, Lejla Batina, Bart Preneel, Ingrid Verbauwhede
    HW/SW co-design for public-key cryptosystems on the 8051 micro-controller. [Citation Graph (0, 0)][DBLP]
    Computers & Electrical Engineering, 2007, v:33, n:5-6, pp:324-332 [Journal]
    
16. 
    A New Approach for Implementing the MPL Method toward Higher SPA Resistance. [Citation Graph (, )][DBLP]
    
    
17. 
    On the high-throughput implementation of RIPEMD-160 hash algorithm. [Citation Graph (, )][DBLP]
    
    
18. 
    Fault Sensitivity Analysis. [Citation Graph (, )][DBLP]
    
    
19. 
    Fault Analysis Attack against an AES Prototype Chip Using RSL. [Citation Graph (, )][DBLP]
    
    
20. 
    Improving Efficiency of an ‘On the Fly' Identification Scheme by Perfecting Zero-Knowledgeness. [Citation Graph (, )][DBLP]
    
    
21. 
    FPGA Design for Algebraic Tori-Based Public-Key Cryptography. [Citation Graph (, )][DBLP]
    
    
22. 
    Power Variance Analysis breaks a masked ASIC implementation of AES. [Citation Graph (, )][DBLP]
    
    
23. 
    Improved countermeasure against Address-bit DPA for ECC scalar multiplication. [Citation Graph (, )][DBLP]
    
    
24. 
    Security Evaluation of a DPA-Resistant S-Box Based on the Fourier Transform. [Citation Graph (, )][DBLP]
    
    
25. 
    Bit-Free Collision: Application to APOP Attack. [Citation Graph (, )][DBLP]
    
    
26. 
    Modular Reduction in GF(2ⁿ) without Pre-computational Phase. [Citation Graph (, )][DBLP]
    
    
27. 
    Montgomery Modular Multiplication Algorithm on Multi-Core Systems. [Citation Graph (, )][DBLP]