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Surendra Byna: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Surendra Byna, Xian-He Sun, Ryan Nakhoul
    Memory Servers: A Scope of SOA for High-End Computing. [Citation Graph (0, 0)][DBLP]
    IEEE SCC, 2006, pp:265-268 [Conf]
  2. Surendra Byna, William D. Gropp, Xian-He Sun, Rajeev Thakur
    Improving the Performance of MPI Derived Datatypes by Optimizing Memory-Access Cost. [Citation Graph (0, 0)][DBLP]
    CLUSTER, 2003, pp:412-419 [Conf]
  3. Surendra Byna, Xian-He Sun, William Gropp, Rajeev Thakur
    Predicting memory-access cost based on data-access patterns. [Citation Graph (0, 0)][DBLP]
    CLUSTER, 2004, pp:327-336 [Conf]
  4. Surendra Byna, Xian-He Sun, Rajeev Thakur, William Gropp
    Automatic Memory Optimizations for Improving MPI Derived Datatype Performance. [Citation Graph (0, 0)][DBLP]
    PVM/MPI, 2006, pp:238-246 [Conf]
  5. Surendra Byna, Kirk W. Cameron, Xian-He Sun
    Isolating Costs in Shared Memory Communication Buffering. [Citation Graph (0, 0)][DBLP]
    Parallel Processing Letters, 2005, v:15, n:4, pp:357-366 [Journal]
  6. Xian-He Sun, Surendra Byna, Yong Chen
    Improving Data Access Performance with Server Push Architecture. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2007, pp:1-6 [Conf]
  7. Xian-He Sun, Surendra Byna, Yong Chen
    Server-Based Data Push Architecture for Multi-Processor Environments. [Citation Graph (0, 0)][DBLP]
    J. Comput. Sci. Technol., 2007, v:22, n:5, pp:641-652 [Journal]

  8. Best-effort semantic document search on GPUs. [Citation Graph (, )][DBLP]


  9. 2008 International Conference on Parallel Processing September 8-12, 2008 Portland, Oregon Exploring Parallel I/O Concurrency with Speculative Prefetching. [Citation Graph (, )][DBLP]


  10. Core-aware memory access scheduling schemes. [Citation Graph (, )][DBLP]


  11. A Taxonomy of Data Prefetching Mechanisms. [Citation Graph (, )][DBLP]


  12. Data access history cache and associated data prefetching mechanisms. [Citation Graph (, )][DBLP]


  13. Parallel I/O prefetching using MPI file caching and I/O signatures. [Citation Graph (, )][DBLP]


  14. Hiding I/O latency with pre-execution prefetching for parallel applications. [Citation Graph (, )][DBLP]


  15. Data-aware scheduling of legacy kernels on heterogeneous platforms with distributed memory. [Citation Graph (, )][DBLP]


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