Search the dblp DataBase

Publications of Author

1. Susan Cotterell, Frank Vahid
   A logic block enabling logic configuration by non-experts in sensor networks. [Citation Graph (0, 0)][DBLP]
   CHI Extended Abstracts, 2005, pp:1925-1928 [Conf]
   
2. Susan Cotterell, Frank Vahid, Walid A. Najjar, Harry Hsieh
   First results with eBlocks: embedded systems building blocks. [Citation Graph (0, 0)][DBLP]
   CODES+ISSS, 2003, pp:168-175 [Conf]
   
3. Roman L. Lysecky, Susan Cotterell, Frank Vahid
   A fast on-chip profiler memory. [Citation Graph (0, 0)][DBLP]
   DAC, 2002, pp:28-33 [Conf]
   
4. Ryan Mannion, Harry Hsieh, Susan Cotterell, Frank Vahid
   System Synthesis for Networks of Programmable Blocks. [Citation Graph (0, 0)][DBLP]
   DATE, 2005, pp:888-893 [Conf]
   
5. Susan Cotterell, Frank Vahid
   Synthesis of customized loop caches for core-based embedded systems. [Citation Graph (0, 0)][DBLP]
   ICCAD, 2002, pp:655-662 [Conf]
   
6. Susan Cotterell, Ryan Mannion, Frank Vahid, Harry Hsieh
   eBlocks - an enabling technology for basic sensor based systems. [Citation Graph (0, 0)][DBLP]
   IPSN, 2005, pp:422-427 [Conf]
   
7. Frank Vahid, Susan Cotterell
   Tuning of Loop Cache Architectures to Programs in Embedded System Design. [Citation Graph (0, 0)][DBLP]
   ISSS, 2002, pp:8-13 [Conf]
   
8. Ann Gordon-Ross, Susan Cotterell, Frank Vahid
   Exploiting Fixed Programs in Embedded Systems: A Loop Cache Example. [Citation Graph (0, 0)][DBLP]
   Computer Architecture Letters, 2002, v:1, n:, pp:- [Journal]
   
9. Frank Vahid, Tony Givargis, Susan Cotterell
   Power Estimator Development for Embedded System Memory Tuning. [Citation Graph (0, 0)][DBLP]
   Journal of Circuits, Systems, and Computers, 2002, v:11, n:5, pp:459-476 [Journal]
   
10. Ann Gordon-Ross, Susan Cotterell, Frank Vahid
    Tiny instruction caches for low power embedded systems. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Embedded Comput. Syst., 2003, v:2, n:4, pp:449-481 [Journal]
    
11. Roman L. Lysecky, Susan Cotterell, Frank Vahid
    A fast on-chip profiler memory using a pipelined binary tree. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2004, v:12, n:1, pp:120-122 [Journal]
    
12. Ryan Mannion, Harry Hsieh, Susan Cotterell, Frank Vahid
    System Synthesis for Networks of Programmable Blocks [Citation Graph (0, 0)][DBLP]
    CoRR, 2007, v:0, n:, pp:- [Journal]