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## Search the dblp DataBase
Qingfeng Zhuge:
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## Publications of Author- Meilin Liu, Qingfeng Zhuge, Zili Shao, Kevin F. Chen, Edwin Hsing-Mean Sha
**Loop Fusion via Retiming for DSP Applications.**[Citation Graph (0, 0)][DBLP] ISCA PDCS, 2004, pp:403-408 [Conf] - Bin Xiao, Qingfeng Zhuge, Zili Shao, Edwin Hsing-Mean Sha
**Design and Analysis of Improved Shortest Path Tree Update for Network Routing.**[Citation Graph (0, 0)][DBLP] ISCA PDCS, 2003, pp:82-87 [Conf] - Zili Shao, Qingfeng Zhuge, Yi He, Edwin Hsing-Mean Sha
**Defending Embedded Systems Against Buffer Overflow via Hardware/Software.**[Citation Graph (0, 0)][DBLP] ACSAC, 2003, pp:352-363 [Conf] - Mei Kang Qiu, Chun Xue, Qingfeng Zhuge, Zili Shao, Meilin Liu, Edwin Hsing-Mean Sha
**Voltage Assignment and Loop Scheduling for Energy Minimization while Satisfying Timing Constraint with Guaranteed Probability.**[Citation Graph (0, 0)][DBLP] ASAP, 2006, pp:178-181 [Conf] - Zili Shao, Qingfeng Zhuge, Meilin Liu, Bin Xiao, Edwin Hsing-Mean Sha
**Switching-Activity Minimization on Instruction-Level Loop Scheduling for VLIWDSP Applications.**[Citation Graph (0, 0)][DBLP] ASAP, 2004, pp:224-234 [Conf] - Zili Shao, Qingfeng Zhuge, Chun Xue, Bin Xiao, Edwin Hsing-Mean Sha
**High-level synthesis for DSP applications using heterogeneous functional units.**[Citation Graph (0, 0)][DBLP] ASP-DAC, 2005, pp:302-304 [Conf] - Meilin Liu, Qingfeng Zhuge, Zili Shao, Edwin Hsing-Mean Sha
**General loop fusion technique for nested loops considering timing and code size.**[Citation Graph (0, 0)][DBLP] CASES, 2004, pp:190-201 [Conf] - Qingfeng Zhuge, Zili Shao, Bin Xiao, Edwin Hsing-Mean Sha
**Design space minimization with timing and code size optimization for embedded DSP.**[Citation Graph (0, 0)][DBLP] CODES+ISSS, 2003, pp:144-149 [Conf] - Mei Kang Qiu, Chun Xue, Zili Shao, Qingfeng Zhuge, Meilin Liu, Edwin Hsing-Mean Sha
**Efficent Algorithm of Energy Minimization for Heterogeneous Wireless Sensor Network.**[Citation Graph (0, 0)][DBLP] EUC, 2006, pp:25-34 [Conf] - Meilin Liu, Qingfeng Zhuge, Zili Shao, Chun Xue, Mei Kang Qiu, Edwin Hsing-Mean Sha
**Loop Distribution and Fusion with Timing and Code Size Optimization for Embedded DSPs.**[Citation Graph (0, 0)][DBLP] EUC, 2005, pp:121-130 [Conf] - Zili Shao, Qingfeng Zhuge, Meilin Liu, Edwin Hsing-Mean Sha, Bin Xiao
**Loop Scheduling for Real-Time DSPs with Minimum Switching Activities on Multiple-Functional-Unit Architectures.**[Citation Graph (0, 0)][DBLP] EUC, 2004, pp:53-63 [Conf] - Ying Chen, Zili Shao, Qingfeng Zhuge, Chun Xue, Bin Xiao, Edwin Hsing-Mean Sha
**Minimizing Energy via Loop Scheduling and DVS for Multi-Core Embedded Systems.**[Citation Graph (0, 0)][DBLP] ICPADS (2), 2005, pp:2-6 [Conf] - Qingfeng Zhuge, Zili Shao, Edwin Hsing-Mean Sha
**Optimal Code Size Reduction for Software-Pipelined Loops on DSP Applications.**[Citation Graph (0, 0)][DBLP] ICPP, 2002, pp:613-620 [Conf] - Qingfeng Zhuge, Zili Shao, Edwin Hsing-Mean Sha
**Timing Optimization of Nested Loops Considering Code Size for DSP Applications.**[Citation Graph (0, 0)][DBLP] ICPP, 2004, pp:475-482 [Conf] - Zili Shao, Qingfeng Zhuge, Yi He, Chun Xue, Meilin Liu, Edwin Hsing-Mean Sha
**Assignment and Scheduling of Real-time DSP Applications for Heterogeneous Functional Units.**[Citation Graph (0, 0)][DBLP] IPDPS, 2004, pp:- [Conf] - Qingfeng Zhuge, Bin Xiao, Edwin Hsing-Mean Sha
**Variable Partitioning and Scheduling of Multiple Memory Architectures for DSP.**[Citation Graph (0, 0)][DBLP] IPDPS, 2002, pp:- [Conf] - Zili Shao, Qingfeng Zhuge, Edwin Hsing-Mean Sha, Chantana Chantrapornchai
**Loop scheduling for minimizing schedule length and switching activities.**[Citation Graph (0, 0)][DBLP] ISCAS (5), 2003, pp:109-112 [Conf] - Qingfeng Zhuge, Edwin Hsing-Mean Sha, Chantana Chantrapornchai
**An Integrated Framework of Design Optimization and Space Minimization for DSP applications.**[Citation Graph (0, 0)][DBLP] ISCAS (5), 2003, pp:601-604 [Conf] - Qingfeng Zhuge, Bin Xiao, Edwin Hsing-Mean Sha
**Performance optimization of multiple memory architectures for DSP.**[Citation Graph (0, 0)][DBLP] ISCAS (5), 2002, pp:469-472 [Conf] - Bin Xiao, Jiannong Cao, Qingfeng Zhuge, Yi He, Edwin Hsing-Mean Sha
**Approximation Algorithms Design for Disk Partial Covering Problem.**[Citation Graph (0, 0)][DBLP] ISPAN, 2004, pp:104-110 [Conf] - Bin Xiao, Jiannong Cao, Qingfeng Zhuge, Zili Shao, Edwin Hsing-Mean Sha
**Dynamic Update of Shortest Path Tree in OSPF.**[Citation Graph (0, 0)][DBLP] ISPAN, 2004, pp:18-23 [Conf] - Zhong Wang, Qingfeng Zhuge, Edwin Hsing-Mean Sha
**Scheduling and partitioning for multiple loop nests.**[Citation Graph (0, 0)][DBLP] ISSS, 2001, pp:183-188 [Conf] - Bin Xiao, Zili Shao, Chantana Chantrapornchai, Edwin Hsing-Mean Sha, Qingfeng Zhuge
**Optimal Code Size Reduction for Software-Pipelined and Unfolded Loops.**[Citation Graph (0, 0)][DBLP] ISSS, 2002, pp:144-149 [Conf] - Zili Shao, Chun Xue, Qingfeng Zhuge, Edwin Hsing-Mean Sha, Bin Xiao
**Security Protection and Checking in Embedded System Integration Against Buffer Overflow Attacks.**[Citation Graph (0, 0)][DBLP] ITCC (1), 2004, pp:409-413 [Conf] - Zili Shao, Chun Xue, Qingfeng Zhuge, Edwin Hsing-Mean Sha, Bin Xiao
**Efficient Array & Pointer Bound Checking Against Buffer Overflow Attacks via Hardware/Software.**[Citation Graph (0, 0)][DBLP] ITCC (1), 2005, pp:780-785 [Conf] - Bin Xiao, Qingfeng Zhuge, Edwin Hsing-Mean Sha, Chantana Chantrapornchai
**Analysis and Algorithms for Partitioning of Large-scale Adaptive Mobile Networks.**[Citation Graph (0, 0)][DBLP] IASTED PDCS, 2002, pp:302-308 [Conf] - Mei Kang Qiu, Meilin Liu, Chun Xue, Qingfeng Zhuge, Edwin Hsing-Mean Sha, Zili Shao
**Optimal Assignment with Guaranteed Confidence Probability for Trees on Heterogeneous DSP Systems.**[Citation Graph (0, 0)][DBLP] IASTED PDCS, 2005, pp:295-300 [Conf] - Bin Xiao, Qingfeng Zhuge, Edwin Hsing-Mean Sha
**Efficient Algorithms for Dynamic Update of Shortest Path Tree in Networking.**[Citation Graph (0, 0)][DBLP] I. J. Comput. Appl., 2004, v:11, n:1, pp:60-75 [Journal] - Zili Shao, Chun Xue, Qingfeng Zhuge, Mei Kang Qiu, Bin Xiao, Edwin Hsing-Mean Sha
**Security Protection and Checking for Embedded System Integration against Buffer Overflow Attacks via Hardware/Software.**[Citation Graph (0, 0)][DBLP] IEEE Trans. Computers, 2006, v:55, n:4, pp:443-453 [Journal] - Qingfeng Zhuge, Bin Xiao, Edwin Hsing-Mean Sha
**Code size reduction technique and implementation for software-pipelined DSP applications.**[Citation Graph (0, 0)][DBLP] ACM Trans. Embedded Comput. Syst., 2003, v:2, n:4, pp:590-613 [Journal] - Zili Shao, Bin Xiao, Chun Xue, Qingfeng Zhuge, Edwin Hsing-Mean Sha
**Loop scheduling with timing and switching-activity minimization for VLIW DSP.**[Citation Graph (0, 0)][DBLP] ACM Trans. Design Autom. Electr. Syst., 2006, v:11, n:1, pp:165-185 [Journal] - Zili Shao, Qingfeng Zhuge, Chun Xue, Edwin Hsing-Mean Sha
**Efficient Assignment and Scheduling for Heterogeneous DSP Systems.**[Citation Graph (0, 0)][DBLP] IEEE Trans. Parallel Distrib. Syst., 2005, v:16, n:6, pp:516-525 [Journal] - Qingfeng Zhuge, Chun Xue, Zili Shao, Meilin Liu, Meikang Qiu, Edwin Hsing-Mean Sha
**Design optimization and space minimization considering timing and code size via retiming and unfolding.**[Citation Graph (0, 0)][DBLP] Microprocessors and Microsystems, 2006, v:30, n:4, pp:173-183 [Journal] - Bin Xiao, Qingfeng Zhuge, Edwin Hsing-Mean Sha
**Efficient Update of Shortest Path Algorithms for Network Routing.**[Citation Graph (0, 0)][DBLP] ISCA PDCS, 2001, pp:315-320 [Conf] - Bin Xiao, Jiannong Cao, Zili Shao, Qingfeng Zhuge, Edwin Hsing-Mean Sha
**Analysis and algorithms design for the partition of large-scale adaptive mobile wireless networks.**[Citation Graph (0, 0)][DBLP] Computer Communications, 2007, v:30, n:8, pp:1899-1912 [Journal] **Parallel Network Intrusion Detection on Reconfigurable Platforms.**[Citation Graph (, )][DBLP]**Maximum Loop Distribution and Fusion for Two-level Loops Considering Code Size.**[Citation Graph (, )][DBLP]
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