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Masaru Takesue: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Masaru Takesue
    Pipelined Conditional Synchronization on Large-Scale Cache-Coherent Multiprocessors. [Citation Graph (0, 0)][DBLP]
    ISCA PDCS, 2003, pp:132-138 [Conf]
  2. Masaru Takesue
    A Bus-Based Recursive Mesh for High-Performance On-Chip Systems. [Citation Graph (0, 0)][DBLP]
    ISCA PDCS, 2006, pp:13-18 [Conf]
  3. Masaru Takesue
    A Model of Pipelined Mutual Exclusion on Cache-Coherent Multiprocessors. [Citation Graph (0, 0)][DBLP]
    Euro-Par, 2003, pp:917-922 [Conf]
  4. Masaru Takesue
    Schemes for Reducing Communication Latency in Regular Computations on DSM Multiprocessors. [Citation Graph (0, 0)][DBLP]
    ICPP, 1998, pp:164-171 [Conf]
  5. Masaru Takesue
    Software Queue-Based Algorithms for Pipelined Synchronization on Multiprocessors. [Citation Graph (0, 0)][DBLP]
    ICPP Workshops, 2003, pp:115-122 [Conf]
  6. Masaru Takesue
    The Psi-Cube: A Bus-Based Cube-Type Network for High-Performance On-Chip Systems. [Citation Graph (0, 0)][DBLP]
    ICPP Workshops, 2005, pp:539-546 [Conf]
  7. Makoto Amamiya, Masaru Takesue, Ryuzo Hasegawa, Hirohide Mikami
    Implementation and Evaluation of a List-Processing-Oriented Data Flow Machine. [Citation Graph (0, 0)][DBLP]
    ISCA, 1986, pp:10-19 [Conf]
  8. Masaru Takesue
    A Unified Resource Management and Execution Control Mechanism for Data Flow Machines. [Citation Graph (0, 0)][DBLP]
    ISCA, 1987, pp:90-97 [Conf]
  9. Masaru Takesue
    A tampering protocol for reducing the coherence transactions in regular computation. [Citation Graph (0, 0)][DBLP]
    ISPAN, 1997, pp:465-471 [Conf]
  10. Masaru Takesue
    Psi-Cubes: Recursive Bused Fat-Hypercubes for Multilevel Snoopy Caches. [Citation Graph (0, 0)][DBLP]
    ISPAN, 1999, pp:62-67 [Conf]
  11. Masaru Takesue
    DC-mesh: A Contracted High-Dimensional Mesh for Dynamic Clustering. [Citation Graph (0, 0)][DBLP]
    NPC, 2004, pp:382-389 [Conf]
  12. Masaru Takesue
    Pipelined Mutual Exclusion on Large-scale Cachecoherent Multiprocessors. [Citation Graph (0, 0)][DBLP]
    IASTED PDCS, 2002, pp:736-745 [Conf]
  13. Masaru Takesue
    The psi-cube: a bus-based cube-type clustering network for high-performance on-chip systems. [Citation Graph (0, 0)][DBLP]
    Parallel Computing, 2006, v:32, n:11-12, pp:852-869 [Journal]
  14. Masaru Takesue
    Dataflow Computer Extension Towards Real-Time Processing. [Citation Graph (0, 0)][DBLP]
    Real-Time Systems, 1989, v:1, n:4, pp:333-350 [Journal]
  15. Masaru Takesue
    Cache Memories for Data Flow Machines. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1992, v:41, n:6, pp:677-687 [Journal]
  16. Masaru Takesue
    A Family of Parallel Prefix Algorithms Embedded in Networks. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Parallel Distrib. Syst., 1993, v:4, n:10, pp:1179-1184 [Journal]
  17. Masaru Takesue
    The SKB: A Semi-Completely-Connected Bus for On-Chip Systems. [Citation Graph (0, 0)][DBLP]
    NPC, 2007, pp:404-414 [Conf]

  18. A Protection Scheme against the Attacks Deployed by Hiding the Violation of the Same Origin Policy. [Citation Graph (, )][DBLP]


  19. A Scheme for Protecting the Information Leakage Via Portable Devices. [Citation Graph (, )][DBLP]


  20. Personalized Filtering of Polymorphic E-mail Spam. [Citation Graph (, )][DBLP]


  21. An HTTP Extension for Secure Transfer of Confidential Data. [Citation Graph (, )][DBLP]


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