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Francisco Rodríguez-Henríquez: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Nareli Cruz Cortés, Francisco Rodríguez-Henríquez, Raúl Juárez-Morales, Carlos A. Coello Coello
    Finding Optimal Addition Chains Using a Genetic Algorithm Approach. [Citation Graph (0, 0)][DBLP]
    CIS (1), 2005, pp:208-215 [Conf]
  2. David Salomón García Palmero, Apolonio Ata Pérez, Manuel I. Martín Ortiz, Francisco Javier Amaro Sánchez, Francisco Rodríguez-Henríquez
    Object Recognition and Sorting By Using a Virtual Cartesian Robot with Artificial Vision. [Citation Graph (0, 0)][DBLP]
    CONIELECOMP, 2005, pp:201-206 [Conf]
  3. Miguel León Chávez, Francisco Rodríguez-Henríquez
    SDL Specification of a Security Architecture for WorldFIP. [Citation Graph (0, 0)][DBLP]
    CONIELECOMP, 2004, pp:149-155 [Conf]
  4. Miguel León Chávez, Carlos Hernández Rosete, Francisco Rodríguez-Henríquez
    Achieving Confidentiality Security Service for CAN. [Citation Graph (0, 0)][DBLP]
    CONIELECOMP, 2005, pp:166-170 [Conf]
  5. Mario Alberto Garcia Martinez, Guillermo Morales-Luna, Francisco Rodríguez-Henríquez
    Hardware Implementation of the Binary Method for Exponentiation in GF(2m). [Citation Graph (0, 0)][DBLP]
    ENC, 2003, pp:131-134 [Conf]
  6. Claudia Garcya-Zamora, Francisco Rodríguez-Henríquez, Daniel Ortiz Arroyo
    SELES: An e-Voting System for Medium Scale Online Elections. [Citation Graph (0, 0)][DBLP]
    ENC, 2005, pp:50-57 [Conf]
  7. Nazar A. Saqib, Francisco Rodríguez-Henríquez, Arturo Díaz-Pérez
    AES Algorithm Implementation-An efficient approach for Sequential and Pipeline Architectures. [Citation Graph (0, 0)][DBLP]
    ENC, 2003, pp:126-130 [Conf]
  8. Nazar A. Saqib, Francisco Rodríguez-Henríquez, Arturo Díaz-Pérez
    Two Approaches for a Single-Chip FPGA Implementation of an Encryptor/Decryptor AES Core. [Citation Graph (0, 0)][DBLP]
    FPL, 2003, pp:303-312 [Conf]
  9. Nareli Cruz Cortés, Francisco Rodríguez-Henríquez, Carlos A. Coello Coello
    On the Optimal Computaion of Finite Field Exponentiation. [Citation Graph (0, 0)][DBLP]
    IBERAMIA, 2004, pp:747-756 [Conf]
  10. Emmanuel López-Trejo, Francisco Rodríguez-Henríquez, Arturo Díaz-Pérez
    An FPGA Implementation of CCM Mode Using AES. [Citation Graph (0, 0)][DBLP]
    ICISC, 2005, pp:322-334 [Conf]
  11. Nazar A. Saqib, Francisco Rodríguez-Henríquez, Arturo Díaz-Pérez
    A Parallel Architecture for Fast Computation of Elliptic Curve Scalar Multiplication over GF(2^m). [Citation Graph (0, 0)][DBLP]
    IPDPS, 2004, pp:- [Conf]
  12. Francisco Rodríguez-Henríquez, Nazar A. Saqib, Nareli Cruz Cortés
    A Fast Implementation of Multiplicative Inversion Over GF(2m). [Citation Graph (0, 0)][DBLP]
    ITCC (1), 2005, pp:574-579 [Conf]
  13. Nazar A. Saqib, Francisco Rodríguez-Henríquez, Arturo Díaz-Pérez
    A Parallel Architecture for Computing Scalar Multiplication on Hessian Elliptic Curves. [Citation Graph (0, 0)][DBLP]
    ITCC (2), 2004, pp:493-497 [Conf]
  14. Mikael Heinze, Daniel Ortiz Arroyo, Henrik Legind Larsen, Francisco Rodríguez-Henríquez
    Fuzzeval: A Fuzzy Controller-Based Approach in Adaptive Learning for Backgammon Game. [Citation Graph (0, 0)][DBLP]
    MICAI, 2005, pp:224-233 [Conf]
  15. Francisco Rodríguez-Henríquez, Çetin Kaya Koç
    Parallel Multipliers Based on Special Irreducible Pentanomials. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2003, v:52, n:12, pp:1535-1542 [Journal]
  16. Francisco Rodríguez-Henríquez, Nazar A. Saqib, Arturo Díaz-Pérez
    A fast parallel implementation of elliptic curve point multiplication over GF(2m). [Citation Graph (0, 0)][DBLP]
    Microprocessors and Microsystems, 2004, v:28, n:5-6, pp:329-339 [Journal]
  17. Francisco Rodríguez-Henríquez, Guillermo Morales-Luna, Nazar A. Saqib, Nareli Cruz Cortés
    A Parallel Version of the Itoh-Tsujii Multiplicative Inversion Algorithm. [Citation Graph (0, 0)][DBLP]
    ARC, 2007, pp:226-237 [Conf]
  18. Francisco Rodríguez-Henríquez, Guillermo Morales-Luna, Nazar A. Saqib, Nareli Cruz Cortés
    Parallel Itoh-Tsujii multiplicative inversion algorithm for a special class of trinomials. [Citation Graph (0, 0)][DBLP]
    Des. Codes Cryptography, 2007, v:45, n:1, pp:19-37 [Journal]

  19. Multi-core Implementation of the Tate Pairing over Supersingular Elliptic Curves. [Citation Graph (, )][DBLP]

  20. Hardware Accelerator for the Tate Pairing in Characteristic Three Based on Karatsuba-Ofman Multipliers. [Citation Graph (, )][DBLP]

  21. On the Generation of X.509v3 Certificates with Biometric Information. [Citation Graph (, )][DBLP]

  22. A PDA Implementation of an Off-line e-Cash Protocol. [Citation Graph (, )][DBLP]

  23. On Some Weaknesses in the Disk Encryption Schemes EME and EME2. [Citation Graph (, )][DBLP]

  24. Efficient Implementations of Some Tweakable Enciphering Schemes in Reconfigurable Hardware. [Citation Graph (, )][DBLP]

  25. An e-Voting Protocol based on Pairing Blind Signatures. [Citation Graph (, )][DBLP]

  26. A Genetic Algorithm with repair and local search mechanisms able to find minimal length addition chains for small exponents. [Citation Graph (, )][DBLP]

  27. A Comparison between Hardware Accelerators for the Modified Tate Pairing over F2m and F3m. [Citation Graph (, )][DBLP]

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