The SCEAS System
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Bradley F. Dutton:
[Publications]
[Author Rank by year]
[Co-authors]
[Prefers]
[Cites]
[Cited by]
Publications of Author
Single Event Upset Detection and Correction in Virtex-4 and Virtex-5 FPGAs. [Citation Graph (, )][DBLP]
Built-In Self-Test of Embedded SEU Detection Cores in Virtex-4 and Virtex-5 FPGAs. [Citation Graph (, )][DBLP]
Embedded Processor Based Fault Injection and SEU Emulation for FPGAs. [Citation Graph (, )][DBLP]
Automated Generation of Built-In Self-Test and Measurement Circuitry for Mixed-Signal Circuits and Systems. [Citation Graph (, )][DBLP]
Soft Core Embedded Processor Based Built-In Self-Test of FPGAs. [Citation Graph (, )][DBLP]
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