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Conferences in DBLP

Parallel Architectures and Languages Europe (PARLE) (parle)
1987 (conf/parle/1987-1)

  1. Geoffrey E. Hinton
    Learning Translation Invariant Recognition in Massively Parallel Networks. [Citation Graph (1, 0)][DBLP]
    PARLE (1), 1987, pp:1-13 [Conf]
  2. Martin Rem
    Trace Theory and Systolic Computations. [Citation Graph (0, 0)][DBLP]
    PARLE (1), 1987, pp:14-33 [Conf]
  3. Emile H. L. Aarts, Jan H. M. Korst
    Boltzmann Machines and their Applications. [Citation Graph (0, 0)][DBLP]
    PARLE (1), 1987, pp:34-50 [Conf]
  4. Paul Anderson, Chris Hankin, Paul Kelly, Peter Osmon, Malcolm J. Shute
    COBWEB-2: Structured Specification of a Wafer-Scale Supercomputer. [Citation Graph (0, 0)][DBLP]
    PARLE (1), 1987, pp:51-67 [Conf]
  5. J. K. Annot, R. A. H. van Twist
    A Novel Deadlock Free and Starvation Free Packet Switching Communication Processor. [Citation Graph (0, 0)][DBLP]
    PARLE (1), 1987, pp:68-85 [Conf]
  6. Pier Giorgio Bosco, Egidio P. Giachin, G. Giandonato, G. Martinengo, Claudio Rullent
    A Parallel Architecture for Signal Understanding through Inference on Uncertain Data. [Citation Graph (0, 0)][DBLP]
    PARLE (1), 1987, pp:86-102 [Conf]
  7. Werner Damm, Gert Döhmen
    An Axiomatic Approach to the Specification of Distributed Computer Architectures. [Citation Graph (0, 0)][DBLP]
    PARLE (1), 1987, pp:103-120 [Conf]
  8. Frank K. H. A. Dehne, Jörg-Rüdiger Sack, Nicola Santoro
    Computing on a Systolic Screen: Hulls, Contours and Applications. [Citation Graph (0, 0)][DBLP]
    PARLE (1), 1987, pp:121-133 [Conf]
  9. Jean-Luc Gaudiot, Liang-Teh Lee
    Multiprocessor Systems Programming in a High-Level Data-Flow Language. [Citation Graph (0, 0)][DBLP]
    PARLE (1), 1987, pp:134-151 [Conf]
  10. Peter A. J. Hilbers, Marion R. J. Koopman, Jan L. A. van de Snepscheut
    The Twisted Cube. [Citation Graph (0, 0)][DBLP]
    PARLE (1), 1987, pp:152-159 [Conf]
  11. Chua-Huang Huang, Christian Lengauer
    An Implemented Method for Incremmental Systolic Design. [Citation Graph (0, 0)][DBLP]
    PARLE (1), 1987, pp:160-177 [Conf]
  12. J. K. Iliffe
    The Use of Parallel Functions in System Design. [Citation Graph (0, 0)][DBLP]
    PARLE (1), 1987, pp:178-194 [Conf]
  13. Anne Kaldewaij
    The Translation of Processes into Circuits. [Citation Graph (0, 0)][DBLP]
    PARLE (1), 1987, pp:195-212 [Conf]
  14. Ottmar Krämer, Heinz Mühlenbein
    Mapping Strategies in Message Based Multiprocessor Systems. [Citation Graph (0, 0)][DBLP]
    PARLE (1), 1987, pp:213-225 [Conf]
  15. Simon H. Lavington, M. Standing, Y. J. Jiang, C. J. Wang, M. E. Waite
    Hardware Memory Management for Large Knowledge Bases. [Citation Graph (0, 0)][DBLP]
    PARLE (1), 1987, pp:226-241 [Conf]
  16. D. L. McBurney, M. Ronan Sleep
    Transputer-Based Experiments with the ZAPP Architecture. [Citation Graph (0, 0)][DBLP]
    PARLE (1), 1987, pp:242-259 [Conf]
  17. Catherine Mongenet, Guy-René Perrin
    Synthesis of Systolic arrays for Inductive Problems. [Citation Graph (0, 0)][DBLP]
    PARLE (1), 1987, pp:260-277 [Conf]
  18. David J. Pritchard, C. R. Askew, D. B. Carpenter, Ian Glendinning, Anthony J. G. Hey, Denis A. Nicole
    Practical Parallelism using Transputer Arrays. [Citation Graph (0, 0)][DBLP]
    PARLE (1), 1987, pp:278-294 [Conf]
  19. Sanjay V. Rajopadhye, Richard Fujimoto
    Systolic Array Synthesis by Static Analysis of Program Dependencies. [Citation Graph (0, 0)][DBLP]
    PARLE (1), 1987, pp:295-310 [Conf]
  20. Peter Schäfer, Ph. Schnoebelen
    Specification of a Pipelined Event Driven Simulator using FP2. [Citation Graph (0, 0)][DBLP]
    PARLE (1), 1987, pp:311-328 [Conf]
  21. Per Stenström, Lars Philipson
    A Layered Emulator for Design Evaluation of MIMD Multiprocessors with Shared Memory. [Citation Graph (0, 0)][DBLP]
    PARLE (1), 1987, pp:329-344 [Conf]
  22. Jack A. Test, Mat Myszewski, Richard C. Swift
    The Alliant FX/Series: A Language Driven Architecture for Parallel Processing of Dusty Deck Fortran. [Citation Graph (0, 0)][DBLP]
    PARLE (1), 1987, pp:345-356 [Conf]
  23. Peter H. Welch
    Emulating Digital Logic using Transputer Networks (very High Parallelism = Simplicity = Performance). [Citation Graph (0, 0)][DBLP]
    PARLE (1), 1987, pp:357-373 [Conf]
  24. Marco Bellia, Pier Giorgio Bosco, Elio Giovannetti, Giorgio Levi, Corrado Moiso, Catuscia Palamidessi
    A Two-Level Approach to Logic plus Functional Programming Integration. [Citation Graph (0, 0)][DBLP]
    PARLE (1), 1987, pp:374-393 [Conf]
  25. D. I. Bevan, Geoffrey L. Burn, R. J. Karia
    Overview of a Parallel Reduction Machine Project. [Citation Graph (0, 0)][DBLP]
    PARLE (1), 1987, pp:394-413 [Conf]
  26. Rubén González-Rubio, J. Rohmer, A. Bradier
    An Overview of DDC: Delta Driven Computer. [Citation Graph (1, 0)][DBLP]
    PARLE (1), 1987, pp:414-433 [Conf]
  27. Philippe Jorrand
    Design and Implementaion of a Parallel Inference Machine for First Order Logic: An Overview. [Citation Graph (0, 0)][DBLP]
    PARLE (1), 1987, pp:434-445 [Conf]
  28. P. Mehring, E. Aposporidis
    Multi-Level Simulator for VLSI - An Overview. [Citation Graph (0, 0)][DBLP]
    PARLE (1), 1987, pp:446-460 [Conf]
  29. Eddy Odijk
    The DOOM System and its Applications: A Survey of Esprit 415 Subproject A, Philips Research Laboratries. [Citation Graph (0, 0)][DBLP]
    PARLE (1), 1987, pp:461-479 [Conf]
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