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Deepanjan Datta: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Deepanjan Datta, Samiran Ganguly
    Design of Multi-bit SET Adder and Its Fault Simulation. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2006, pp:549-552 [Conf]
  2. Deblina Sarkar, Samiran Ganguly, Deepanjan Datta, A. Ananda Prasad Sarab, Sudeb Dasgupta
    Modeling of Leakages in Nano-Scale DG MOSFET to Implement Low Power SRAM: A Device/Circuit Co-Design. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2007, pp:183-188 [Conf]
  3. Deepanjan Datta, A. Ananda Prasad Sarab, Sudeb Dasgupta
    Two-dimensional numerical modeling of lightly doped nano-scale double-gate MOSFET. [Citation Graph (0, 0)][DBLP]
    Microelectronics Journal, 2006, v:37, n:6, pp:537-545 [Journal]

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