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Timo Latvala :
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Timo Latvala Model Checking LTL Properties of High-Level Petri Nets with Fairness Constraints. [Citation Graph (0, 0)][DBLP ] ICATPN, 2001, pp:242-262 [Conf ] Timo Latvala , Marko Mäkelä LTL Model Checking for Modular Petri Nets. [Citation Graph (0, 0)][DBLP ] ICATPN, 2004, pp:298-311 [Conf ] Keijo Heljanko , Tommi A. Junttila , Misa Keinänen , Martin Lange , Timo Latvala Bounded Model Checking for Weak Alternating Büchi Automata. [Citation Graph (0, 0)][DBLP ] CAV, 2006, pp:95-108 [Conf ] Keijo Heljanko , Tommi A. Junttila , Timo Latvala Incremental and Complete Bounded Model Checking for Full PLTL. [Citation Graph (0, 0)][DBLP ] CAV, 2005, pp:98-111 [Conf ] Timo Latvala , Armin Biere , Keijo Heljanko , Tommi A. Junttila Simple Bounded LTL Model Checking. [Citation Graph (0, 0)][DBLP ] FMCAD, 2004, pp:186-200 [Conf ] Yaniv Eytani , Timo Latvala Explaining Intermittent Concurrent Bugs by Minimizing Scheduling Noise. [Citation Graph (0, 0)][DBLP ] Haifa Verification Conference, 2006, pp:183-197 [Conf ] Timo Latvala Efficient Model Checking of Safety Properties. [Citation Graph (0, 0)][DBLP ] SPIN, 2003, pp:74-88 [Conf ] Timo Latvala , Armin Biere , Keijo Heljanko , Tommi A. Junttila Simple Is Better: Efficient Bounded Model Checking for Past LTL. [Citation Graph (0, 0)][DBLP ] VMCAI, 2005, pp:380-395 [Conf ] Timo Latvala , Keijo Heljanko Coping With Strong Fairness. [Citation Graph (0, 0)][DBLP ] Fundam. Inform., 2000, v:43, n:1-4, pp:175-193 [Journal ] Timo Latvala , Heikki Tauriainen Improved On-the-fly Verification with Testers. [Citation Graph (0, 0)][DBLP ] Nord. J. Comput., 2004, v:11, n:2, pp:148-164 [Journal ] Rajesh K. Karmani , Timo Latvala , Gul Agha On Scaling Multi-Agent Task Reallocation Using Market-Based Approach. [Citation Graph (0, 0)][DBLP ] SASO, 2007, pp:173-182 [Conf ] Armin Biere , Keijo Heljanko , Tommi A. Junttila , Timo Latvala , Viktor Schuppan Linear Encodings of Bounded LTL Model Checking [Citation Graph (0, 0)][DBLP ] CoRR, 2006, v:0, n:, pp:- [Journal ] Supporting Reuse in Event B Development: Modularisation Approach. [Citation Graph (, )][DBLP ] Verifying Mode Consistency for On-Board Satellite Software. [Citation Graph (, )][DBLP ] Developing Mode-Rich Satellite Software by Refinement in Event B. [Citation Graph (, )][DBLP ] Search in 0.002secs, Finished in 0.002secs