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Pan Zhongliang: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Pan Zhongliang
    Fault Detection for Testable Realizations of Multiple-Valued Logic Functions. [Citation Graph (0, 0)][DBLP]
    Asian Test Symposium, 2003, pp:242-249 [Conf]
  2. Pan Zhongliang, Chen Ling, Liu Shouqiang, GuangZhao Zhang
    Neural Network Approach for Multiple Fault Test of Digital Circuit. [Citation Graph (0, 0)][DBLP]
    ISDA (3), 2006, pp:24-29 [Conf]
  3. Pan Zhongliang
    Bridging Fault Detections for Testable Realizations of Logic Functions. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2003, pp:423-0 [Conf]
  4. Pan Zhongliang
    Neural Network Model for Testing Stuck-at and Delay Faults in Digital Circuit. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2004, pp:499-0 [Conf]

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