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Jörg Bormann:
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- Jörg Bormann, Jörg Lohse, Michael Payer, Gerd Venzl
Model Checking in Industrial Hardware Design. [Citation Graph (0, 0)][DBLP] DAC, 1995, pp:298-303 [Conf]
- Jörg Bormann, H. Nusser-Wehlan, Gerd Venzl
Invited Talk: Formal Design in an Industrial Research Laboratory: Lessons and Perspectives. [Citation Graph (0, 0)][DBLP] Designing Correct Circuits, 1992, pp:193-213 [Conf]
Analyzing k-step induction to compute invariants for SAT-based property checking. [Citation Graph (, )][DBLP]
Semi-formal Verification of the quasi-static behavior of Mixed-Signal Circuits by SAT-based Property Checking. [Citation Graph (, )][DBLP]
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