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Reza M. Rad:
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Publications of Author
- Reza M. Rad, Mohammad Tehranipoor
A new hybrid FPGA with nanoscale clusters and CMOS routing. [Citation Graph (0, 0)][DBLP] DAC, 2006, pp:727-730 [Conf]
- Reza M. Rad, Mohammad Tehranipoor
A Reconfiguration-based Defect Tolerance Method for Nanoscale Devices. [Citation Graph (0, 0)][DBLP] DFT, 2006, pp:107-118 [Conf]
- Mohammad Tehranipoor, Reza M. Rad
Fine-grained island style architecture for molecular electronic devices. [Citation Graph (0, 0)][DBLP] FPGA, 2006, pp:226- [Conf]
- Mohammad Tehranipoor, Reza M. Rad
Test and recovery for fine-grained nanoscale architectures. [Citation Graph (0, 0)][DBLP] FPGA, 2006, pp:226- [Conf]
- Reza M. Rad, Mohammad Tehranipoor
SCT: An Approach For Testing and Configuring Nanoscale Devices. [Citation Graph (0, 0)][DBLP] VTS, 2006, pp:370-377 [Conf]
Power supply signal calibration techniques for improving detection resolution to hardware Trojans. [Citation Graph (, )][DBLP]
Sensitivity Analysis to Hardware Trojans using Power Supply Transient Signals. [Citation Graph (, )][DBLP]
Defect Tolerance for Nanoscale Crossbar-Based Devices. [Citation Graph (, )][DBLP]
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