|
Search the dblp DataBase
Stephen J. Garland:
[Publications]
[Author Rank by year]
[Co-authors]
[Prefers]
[Cites]
[Cited by]
Publications of Author
- Frank H. Young, Stephen J. Garland, Robert Poland, David C. Rine
Advanced placement in Computer Science (panel session): college level computer science in the high schools. [Citation Graph (0, 0)][DBLP] ACM Conference on Computer Science, 1986, pp:393- [Conf]
- Jørgen Staunstrup, Stephen J. Garland, John V. Guttag
Localized Verification of Circuit Descriptions. [Citation Graph (0, 0)][DBLP] Automatic Verification Methods for Finite State Systems, 1989, pp:349-364 [Conf]
- Stephen J. Garland, John V. Guttag
LP: The Larch Prover. [Citation Graph (0, 0)][DBLP] CADE, 1988, pp:748-749 [Conf]
- Katherine A. Yelick, Stephen J. Garland
A Parallel Completion Procedure for Term Rewriting Systems. [Citation Graph (0, 0)][DBLP] CADE, 1992, pp:109-123 [Conf]
- Jørgen F. Søgaard-Andersen, Stephen J. Garland, John V. Guttag, Nancy A. Lynch, Anna Pogosyants
Computer-Assisted Simulation Proofs. [Citation Graph (0, 0)][DBLP] CAV, 1993, pp:305-319 [Conf]
- Andrej Bogdanov, Stephen J. Garland, Nancy A. Lynch
Mechanical Translation of I/O Automaton Specifications into First-Order Logic. [Citation Graph (0, 0)][DBLP] FORTE, 2002, pp:364-368 [Conf]
- Victor Luchangco, Ekrem Söylemez, Stephen J. Garland, Nancy A. Lynch
Verifying timing properties of concurrent algorithms. [Citation Graph (0, 0)][DBLP] FORTE, 1994, pp:259-273 [Conf]
- Tsvetomir P. Petrov, Anna Pogosyants, Stephen J. Garland, Victor Luchangco, Nancy A. Lynch
Computer-Assisted Verification of an Algorithm for Concurrent Timestamps. [Citation Graph (0, 0)][DBLP] FORTE, 1996, pp:29-44 [Conf]
- James B. Saxe, Stephen J. Garland, John V. Guttag, James J. Horning
Using Transformations and Verification in Ciruit Design. [Citation Graph (0, 0)][DBLP] Designing Correct Circuits, 1992, pp:1-25 [Conf]
- Li-Wei H. Lehman, Stephen J. Garland, David L. Tennenhouse
Active Reliable Multicast. [Citation Graph (0, 0)][DBLP] INFOCOM, 1998, pp:581-589 [Conf]
- James B. Saxe, John V. Guttag, James J. Horning, Stephen J. Garland
Using Transformations and Verification in Circuit Design. [Citation Graph (0, 0)][DBLP] Larch, 1992, pp:201-226 [Conf]
- Stephen J. Garland, John V. Guttag, James J. Horning
An Overview of Larch. [Citation Graph (0, 0)][DBLP] Functional Programming, Concurrency, Simulation and Automated Reasoning, 1993, pp:329-348 [Conf]
- Stephen J. Garland, John V. Guttag
Inductive Methods for Reasoning about Abstract Data Types. [Citation Graph (0, 0)][DBLP] POPL, 1988, pp:219-228 [Conf]
- Stephen J. Garland, John V. Guttag
An Overview of LP, The Larch Power. [Citation Graph (0, 0)][DBLP] RTA, 1989, pp:137-151 [Conf]
- Stephen J. Garland, David C. Luckham
On the Equivalence of Schemes [Citation Graph (0, 0)][DBLP] STOC, 1972, pp:65-72 [Conf]
- Jørgen Staunstrup, Stephen J. Garland, John V. Guttag
Mechanized Verification of Circuit Descriptions Using the Larch Prover. [Citation Graph (0, 0)][DBLP] TPCD, 1992, pp:277-299 [Conf]
- Toh Ne Win, Michael D. Ernst, Stephen J. Garland, Dilsun Kirli Kaynar, Nancy A. Lynch
Using Simulated Execution in Verifying Distributed Algorithms. [Citation Graph (0, 0)][DBLP] VMCAI, 2003, pp:283-297 [Conf]
- Stephen J. Garland, Anthony W. Knapp
Algorithm 99: Evaluation of Jacobi symbol. [Citation Graph (0, 0)][DBLP] Commun. ACM, 1962, v:5, n:6, pp:345-346 [Journal]
- James B. Saxe, James J. Horning, John V. Guttag, Stephen J. Garland
Using Transformations and Verification in Circuit Design. [Citation Graph (0, 0)][DBLP] Formal Methods in System Design, 1993, v:3, n:3, pp:181-209 [Journal]
- Stephen J. Garland, David C. Luckham
Program Schemes, Recursion Schemes, and Formal Languages. [Citation Graph (0, 0)][DBLP] J. Comput. Syst. Sci., 1973, v:7, n:2, pp:119-160 [Journal]
- Stephen J. Garland
Generalized Interpolation Theorems. [Citation Graph (0, 0)][DBLP] J. Symb. Log., 1972, v:37, n:2, pp:343-351 [Journal]
- Toh Ne Win, Michael D. Ernst, Stephen J. Garland, Dilsun Kirli Kaynar, Nancy A. Lynch
Using simulated execution in verifying distributed algorithms. [Citation Graph (0, 0)][DBLP] STTT, 2004, v:6, n:1, pp:67-76 [Journal]
- Stephen J. Garland, John V. Guttag, James J. Horning
Debugging Larch Shared Language Specifications. [Citation Graph (0, 0)][DBLP] IEEE Trans. Software Eng., 1990, v:16, n:9, pp:1044-1057 [Journal]
Search in 0.041secs, Finished in 0.043secs
|