The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Katherine A. Yelick: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Remzi H. Arpaci-Dusseau, Eric Anderson, Noah Treuhaft, David E. Culler, Joseph M. Hellerstein, David A. Patterson, Katherine A. Yelick
    Cluster I/O with River: Making the Fast Case Common. [Citation Graph (2, 0)][DBLP]
    IOPADS, 1999, pp:10-22 [Conf]
  2. Shoaib Kamil, Parry Husbands, Leonid Oliker, John Shalf, Katherine A. Yelick
    Impact of modern memory subsystems on cache optimizations for stencil computations. [Citation Graph (0, 0)][DBLP]
    Memory System Performance, 2005, pp:36-43 [Conf]
  3. Wei-Yu Chen, Costin Iancu, Katherine A. Yelick
    Communication Optimizations for Fine-Grained UPC Applications. [Citation Graph (0, 0)][DBLP]
    IEEE PACT, 2005, pp:267-278 [Conf]
  4. Arvind Krishnamurthy, Klaus E. Schauser, Chris J. Scheiman, Randolph Y. Wang, David E. Culler, Katherine A. Yelick
    Evaluation of Architectural Support for Global Address-Based Communication in Large-Scale Parallel Machines. [Citation Graph (0, 0)][DBLP]
    ASPLOS, 1996, pp:37-48 [Conf]
  5. Katherine A. Yelick, Stephen J. Garland
    A Parallel Completion Procedure for Term Rewriting Systems. [Citation Graph (0, 0)][DBLP]
    CADE, 1992, pp:109-123 [Conf]
  6. Samuel Williams, John Shalf, Leonid Oliker, Shoaib Kamil, Parry Husbands, Katherine A. Yelick
    The potential of the cell processor for scientific computing. [Citation Graph (0, 0)][DBLP]
    Conf. Computing Frontiers, 2006, pp:9-20 [Conf]
  7. Katherine A. Yelick
    Parallel Completion. [Citation Graph (0, 0)][DBLP]
    Dagstuhl Seminar on Parallelization in Inference Systems, 1990, pp:348- [Conf]
  8. Eun-Jin Im, Katherine A. Yelick
    Optimizing Sparse Matrix Computations for Register Reuse in SPARSITY. [Citation Graph (0, 0)][DBLP]
    International Conference on Computational Science (1), 2001, pp:127-136 [Conf]
  9. Rich Vuduc, Attila Gyulassy, James Demmel, Katherine A. Yelick
    Memory Hierarchy Optimizations and Performance ounds for Sparse A. [Citation Graph (0, 0)][DBLP]
    International Conference on Computational Science, 2003, pp:705-714 [Conf]
  10. Chih-Po Wen, Katherine A. Yelick
    Parallel timing simulation on a distributed memory multiprocessor. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1993, pp:130-135 [Conf]
  11. David A. Patterson, Krste Asanovic, Aaron B. Brown, Richard Fromm, Jason Golbus, Benjamin Gribstad, Kimberly Keeton, Christoforos E. Kozyrakis, David Martin, Stylianos Perissakis, Randi Thomas, Noah Treuhaft, Katherine A. Yelick
    Intelligent RAM (IRAM): The Industrial Setting, Applications and Architectures. [Citation Graph (0, 0)][DBLP]
    ICCD, 1997, pp:2-7 [Conf]
  12. Thinh P. Q. Nguyen, Avideh Zakhor, Katherine A. Yelick
    Performance Analysis of an H.263 Video Encoder for VIRAM. [Citation Graph (0, 0)][DBLP]
    ICIP, 2000, pp:- [Conf]
  13. Benjamin C. Lee, Richard W. Vuduc, James Demmel, Katherine A. Yelick
    Performance Models for Evaluation and Automatic Tuning of Symmetric Sparse Matrix-Vector Multiply. [Citation Graph (0, 0)][DBLP]
    ICPP, 2004, pp:169-176 [Conf]
  14. Hongzhang Shan, Ji Qiang, Erich Strohmaier, Katherine A. Yelick
    Performance Analysis of a High Energy Colliding Beam Simulation Code on Four HPC Architectures. [Citation Graph (0, 0)][DBLP]
    ICPP, 2006, pp:237-244 [Conf]
  15. Chih-Po Wen, Katherine A. Yelick
    Portable Runtime Support for Asynchronous Simulation. [Citation Graph (0, 0)][DBLP]
    ICPP (2), 1995, pp:196-205 [Conf]
  16. Christian Bell, Wei-Yu Chen, Dan Bonachea, Katherine A. Yelick
    Evaluating support for global address space languages on the Cray X1. [Citation Graph (0, 0)][DBLP]
    ICS, 2004, pp:184-195 [Conf]
  17. Parry Husbands, Costin Iancu, Katherine A. Yelick
    A performance analysis of the Berkeley UPC compiler. [Citation Graph (0, 0)][DBLP]
    ICS, 2003, pp:63-73 [Conf]
  18. David Judd, Katherine A. Yelick, Christoforos E. Kozyrakis, David Martin, David A. Patterson
    Exploiting On-Chip Memory Bandwidth in the VIRAM Compiler. [Citation Graph (0, 0)][DBLP]
    Intelligent Memory Systems, 2000, pp:122-134 [Conf]
  19. Christian Bell, Dan Bonachea, Yannick Cote, Jason Duell, Paul Hargrove, Parry Husbands, Costin Iancu, Michael L. Welcome, Katherine A. Yelick
    An Evaluation of Current High-Performance Networks. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2003, pp:28- [Conf]
  20. Brian R. Gaeke, Parry Husbands, Xiaoye S. Li, Leonid Oliker, Katherine A. Yelick, Rupak Biswas
    Memory-Intensive Benchmarks: IRAM vs. Cache-Based Machines. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2002, pp:- [Conf]
  21. Gorden Griem, Leonid Oliker, John Shalf, Katherine A. Yelick
    Identifying Performance Bottlenecks on Modern Microarchitectures Using an Adaptable Probe. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2004, pp:- [Conf]
  22. Jimmy Su, Katherine A. Yelick
    Array Prefetching for Irregular Array Accesses in Titanium. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2004, pp:- [Conf]
  23. Jimmy Su, Katherine A. Yelick
    Automatic Support for Irregular Computations in a High-Level Language. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2005, pp:- [Conf]
  24. Steve G. Steinberg, Jun Yang, Katherine A. Yelick
    Performance Modeling and Composition: A Case Study in Cell Simulation. [Citation Graph (0, 0)][DBLP]
    IPPS, 1996, pp:68-74 [Conf]
  25. Christian Bell, Dan Bonachea, Rajesh Nishtala, Katherine A. Yelick
    Optimizing bandwidth limited problems using one-sided communication and overlap. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2006, pp:- [Conf]
  26. Katherine A. Yelick
    Systems Support for Irregular Parallel Applications (Abstract). [Citation Graph (0, 0)][DBLP]
    IRREGULAR, 1996, pp:145- [Conf]
  27. Remzi H. Arpaci-Dusseau, David E. Culler, Arvind Krishnamurthy, Steve G. Steinberg, Katherine A. Yelick
    Empirical Evaluation of the CRAY-T3D: A Compiler Perspective. [Citation Graph (0, 0)][DBLP]
    ISCA, 1995, pp:320-331 [Conf]
  28. Richard Fromm, Stylianos Perissakis, Neal Cardwell, Christoforos E. Kozyrakis, Bruce McGaughy, David A. Patterson, Thomas E. Anderson, Katherine A. Yelick
    The Energy Efficiency of IRAM Architectures. [Citation Graph (0, 0)][DBLP]
    ISCA, 1997, pp:327-337 [Conf]
  29. Wei-Yu Chen, Arvind Krishnamurthy, Katherine A. Yelick
    Polynomial-Time Algorithms for Enforcing Sequential Consistency in SPMD Programs with Arrays. [Citation Graph (0, 0)][DBLP]
    LCPC, 2003, pp:340-356 [Conf]
  30. Arvind Krishnamurthy, Katherine A. Yelick
    Optimizing Parallel SPMD Programs. [Citation Graph (0, 0)][DBLP]
    LCPC, 1994, pp:331-345 [Conf]
  31. Kaushik Datta, Dan Bonachea, Katherine A. Yelick
    Titanium Performance and Potential: An NPB Experimental Study. [Citation Graph (0, 0)][DBLP]
    LCPC, 2005, pp:200-214 [Conf]
  32. Amir Kamil, Katherine A. Yelick
    Concurrency Analysis for Parallel Programs with Textually Aligned Barriers. [Citation Graph (0, 0)][DBLP]
    LCPC, 2005, pp:185-199 [Conf]
  33. Eun-Jin Im, Ismail Bustany, Cleve Ashcraft, James Demmel, Katherine A. Yelick
    Performance Tuning of Matrix Triple Products Based on Matrix Structure. [Citation Graph (0, 0)][DBLP]
    PARA, 2004, pp:740-746 [Conf]
  34. Arvind Krishnamurthy, Katherine A. Yelick
    Optimizing Parallel Programs with Explicit Synchronization. [Citation Graph (0, 0)][DBLP]
    PLDI, 1995, pp:196-204 [Conf]
  35. Katherine A. Yelick, Joseph L. Zachary
    Moded Type Systems for Logic Programming. [Citation Graph (0, 0)][DBLP]
    POPL, 1989, pp:116-124 [Conf]
  36. Soumen Chakrabarti, Katherine A. Yelick
    Implementing an Irregular Application on a Distributed Memory Multiprocessor. [Citation Graph (0, 0)][DBLP]
    PPOPP, 1993, pp:169-178 [Conf]
  37. Katherine A. Yelick
    Language innovations for HPCS. [Citation Graph (0, 0)][DBLP]
    PPOPP, 2005, pp:119- [Conf]
  38. Eun-Jin Im, Katherine A. Yelick
    Optimizing Sparse Matrix Vector Multiplication on SMP. [Citation Graph (0, 0)][DBLP]
    PPSC, 1999, pp:- [Conf]
  39. Arvind Krishnamurthy, Alexander Aiken, Phillip Colella, David Gay, Susan L. Graham, Paul N. Hilfinger, Ben Liblit, Carleton Miyamoto, Geoff Pike, Luigi Semenzato, Katherine A. Yelick
    Titanium: A High Performance Java Dialect. [Citation Graph (0, 0)][DBLP]
    PPSC, 1999, pp:- [Conf]
  40. Katherine A. Yelick, Chih-Po Wen, Soumen Chakrabarti, Etienne Deprit, Jeff A. Jones, Arvind Krishnamurthy
    Portable Parallel Irregular Applications. [Citation Graph (0, 0)][DBLP]
    PSLS, 1995, pp:157-173 [Conf]
  41. Katherine A. Yelick
    Performance Advantages of Partitioned Global Address Space Languages. [Citation Graph (0, 0)][DBLP]
    PVM/MPI, 2006, pp:6- [Conf]
  42. Soumen Chakrabarti, Katherine A. Yelick
    On the Correctness of a Distributed Memory Gröbner basis Algorithm. [Citation Graph (0, 0)][DBLP]
    RTA, 1993, pp:77-91 [Conf]
  43. Katherine A. Yelick
    Combining Unification Algorithms for Confined Regular Equational Theories. [Citation Graph (0, 0)][DBLP]
    RTA, 1985, pp:365-380 [Conf]
  44. Ben Liblit, Alexander Aiken, Katherine A. Yelick
    Type Systems for Distributed Data Sharing. [Citation Graph (0, 0)][DBLP]
    SAS, 2003, pp:273-294 [Conf]
  45. Geoffrey Fox, Sanjay Ranka, Michael L. Scott, Allen D. Malony, James C. Browne, Marina C. Chen, Alok N. Choudhary, Thomas Cheatham, Janice E. Cuny, Rudolf Eigenmann, Amr F. Fahmy, Ian T. Foster, Dennis Gannon, Tomasz Haupt, Carl Kesselman, Charles Koelbel, Wei Li, Monica S. Lam, Thomas J. LeBlanc, Jim Openshaw, David A. Padua, Constantine D. Polychronopoulos, Joel H. Saltz, Alan Sussman, Gil Weigand, Katherine A. Yelick
    Common runtime support for high-performance parallel languages. [Citation Graph (0, 0)][DBLP]
    SC, 1993, pp:752-757 [Conf]
  46. David E. Culler, Andrea C. Arpaci-Dusseau, Seth Copen Goldstein, Arvind Krishnamurthy, Steven Lumetta, Thorsten von Eicken, Katherine A. Yelick
    Parallel programming in Split-C. [Citation Graph (0, 0)][DBLP]
    SC, 1993, pp:262-273 [Conf]
  47. Jeff A. Jones, Katherine A. Yelick
    Parallelizing the Phylogeny Problem. [Citation Graph (0, 0)][DBLP]
    SC, 1995, pp:- [Conf]
  48. Amir Kamil, Jimmy Su, Katherine A. Yelick
    Making Sequential Consistency Practical in Titanium. [Citation Graph (0, 0)][DBLP]
    SC, 2005, pp:15- [Conf]
  49. Rich Vuduc, James Demmel, Katherine A. Yelick, Shoaib Kamil, Rajesh Nishtala, Benjamin C. Lee
    Performance optimizations and bounds for sparse matrix-vector multiply. [Citation Graph (0, 0)][DBLP]
    SC, 2002, pp:1-35 [Conf]
  50. Hongzhang Shan, Erich Strohmaier, Ji Qiang, David H. Bailey, Katherine A. Yelick
    Particles and contiuum - Performance modeling and optimization of a high energy colliding beam simulation code. [Citation Graph (0, 0)][DBLP]
    SC, 2006, pp:97- [Conf]
  51. Dan Bonachea, Paul Hargrove, Rajesh Nishtala, Michael L. Welcome, Katherine A. Yelick
    Poster reception - Optimized collectives for PGAS languages with one-sided communication. [Citation Graph (0, 0)][DBLP]
    SC, 2006, pp:143- [Conf]
  52. Katherine A. Yelick
    Programming Models for Irregular Applications. [Citation Graph (0, 0)][DBLP]
    SIGPLAN Workshop, 1992, pp:28-31 [Conf]
  53. Soumen Chakrabarti, James Demmel, Katherine A. Yelick
    Modeling the Benefits of Mixed Data and Task Parallelism. [Citation Graph (0, 0)][DBLP]
    SPAA, 1995, pp:74-83 [Conf]
  54. Christoforos E. Kozyrakis, Stylianos Perissakis, David A. Patterson, Thomas E. Anderson, Krste Asanovic, Neal Cardwell, Richard Fromm, Jason Golbus, Benjamin Gribstad, Kimberly Keeton, Randi Thomas, Noah Treuhaft, Katherine A. Yelick
    Scalable Processors in the Billion-Transistor Era: IRAM. [Citation Graph (0, 0)][DBLP]
    IEEE Computer, 1997, v:30, n:9, pp:75-78 [Journal]
  55. Katherine A. Yelick, Luigi Semenzato, Geoff Pike, Carleton Miyamoto, Ben Liblit, Arvind Krishnamurthy, Paul N. Hilfinger, Susan L. Graham, David Gay, Phillip Colella, Alexander Aiken
    Titanium: A High-performance Java Dialect. [Citation Graph (0, 0)][DBLP]
    Concurrency - Practice and Experience, 1998, v:10, n:11-13, pp:825-836 [Journal]
  56. Soumen Chakrabarti, James Demmel, Katherine A. Yelick
    Models and Scheduling Algorithms for Mixed Data and Task Parallel Programs. [Citation Graph (0, 0)][DBLP]
    J. Parallel Distrib. Comput., 1997, v:47, n:2, pp:168-184 [Journal]
  57. Arvind Krishnamurthy, Katherine A. Yelick
    Analyses and Optimizations for Shared Address Space Programs. [Citation Graph (0, 0)][DBLP]
    J. Parallel Distrib. Comput., 1996, v:38, n:2, pp:130-144 [Journal]
  58. Katherine A. Yelick
    Unification in Combinations of Collapse-Free Regular Theories. [Citation Graph (0, 0)][DBLP]
    J. Symb. Comput., 1987, v:3, n:1/2, pp:153-181 [Journal]
  59. Soumen Chakrabarti, Katherine A. Yelick
    Distributed Data Structures and Algorithms for Gröbner Basis Computation. [Citation Graph (0, 0)][DBLP]
    Lisp and Symbolic Computation, 1994, v:7, n:2-3, pp:147-172 [Journal]
  60. David L. Oppenheimer, Aaron B. Brown, James Beck, Daniel Hettena, Jon Kuroda, Noah Treuhaft, David A. Patterson, Katherine A. Yelick
    ROC-1: Hardware Support for Recovery-Oriented Computing. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2002, v:51, n:2, pp:100-107 [Journal]
  61. Edward Givelberg, Katherine A. Yelick
    Distributed Immersed Boundary Simulation in Titanium. [Citation Graph (0, 0)][DBLP]
    SIAM J. Scientific Computing, 2006, v:28, n:4, pp:1361-1378 [Journal]
  62. Wei-Yu Chen, Dan Bonachea, Costin Iancu, Katherine A. Yelick
    Automatic nonblocking communication for partitioned global address space programs. [Citation Graph (0, 0)][DBLP]
    ICS, 2007, pp:158-167 [Conf]
  63. Kathy Yelick
    Compilation Techniques for Partitioned Global Address Space Languages. [Citation Graph (0, 0)][DBLP]
    LCPC, 2006, pp:1- [Conf]
  64. Amir Kamil, Katherine A. Yelick
    Hierarchical Pointer Analysis for Distributed Programs. [Citation Graph (0, 0)][DBLP]
    SAS, 2007, pp:281-297 [Conf]
  65. Shivali Agarwal, Rajkishore Barik, Dan Bonachea, Vivek Sarkar, R. K. Shyamasundar, Katherine A. Yelick
    Deadlock-free scheduling of X10 computations with bounded resources. [Citation Graph (0, 0)][DBLP]
    SPAA, 2007, pp:229-240 [Conf]
  66. Rajesh Nishtala, Richard W. Vuduc, James Demmel, Katherine A. Yelick
    When cache blocking of sparse matrix vector multiply works and why. [Citation Graph (0, 0)][DBLP]
    Appl. Algebra Eng. Commun. Comput., 2007, v:18, n:3, pp:297-311 [Journal]
  67. Rajesh Nishtala, Richard W. Vuduc, James Demmel, Katherine A. Yelick
    When cache blocking of sparse matrix vector multiply works and why. [Citation Graph (0, 0)][DBLP]
    Appl. Algebra Eng. Commun. Comput., 2007, v:18, n:3, pp:297-311 [Journal]
  68. Samuel Williams, John Shalf, Leonid Oliker, Shoaib Kamil, Parry Husbands, Katherine A. Yelick
    Scientific Computing Kernels on the Cell Processor. [Citation Graph (0, 0)][DBLP]
    International Journal of Parallel Programming, 2007, v:35, n:3, pp:263-298 [Journal]

  69. Implicit and explicit optimizations for stencil computations. [Citation Graph (, )][DBLP]


  70. Performance Portable Optimizations for Loops Containing Communication Operations. [Citation Graph (, )][DBLP]


  71. Improving Memory Subsystem Performance Using ViVA: Virtual Vector Architecture. [Citation Graph (, )][DBLP]


  72. Scheduling dynamic parallelism on accelerators. [Citation Graph (, )][DBLP]


  73. Performance portable optimizations for loops containing communication operations. [Citation Graph (, )][DBLP]


  74. Avoiding communication in sparse matrix computations. [Citation Graph (, )][DBLP]


  75. Programming models for petascale to exascale. [Citation Graph (, )][DBLP]


  76. Lattice Boltzmann simulation optimization on leading multicore platforms. [Citation Graph (, )][DBLP]


  77. Scaling communication-intensive applications on BlueGene/P using one-sided communication and overlap. [Citation Graph (, )][DBLP]


  78. Ten ways to waste a parallel computer. [Citation Graph (, )][DBLP]


  79. Productivity and performance using partitioned global address space languages. [Citation Graph (, )][DBLP]


  80. Automatic Communication Performance Debugging in PGAS Languages. [Citation Graph (, )][DBLP]


  81. Enforcing Textual Alignment of Collectives Using Dynamic Checks. [Citation Graph (, )][DBLP]


  82. Multi-threading and one-sided communication in parallel LU factorization. [Citation Graph (, )][DBLP]


  83. Optimization of sparse matrix-vector multiplication on emerging multicore platforms. [Citation Graph (, )][DBLP]


  84. An adaptive mesh refinement benchmark for modern parallel programming languages. [Citation Graph (, )][DBLP]


  85. Memory-efficient optimization of Gyrokinetic particle-to-grid interpolation for multicore processors. [Citation Graph (, )][DBLP]


  86. Stencil computation optimization and auto-tuning on state-of-the-art multicore architectures. [Citation Graph (, )][DBLP]


  87. Minimizing communication in sparse matrix solvers. [Citation Graph (, )][DBLP]


  88. DARPA's HPCS Program- History, Models, Tools, Languages. [Citation Graph (, )][DBLP]


  89. Technical perspective - Abstraction for parallelism. [Citation Graph (, )][DBLP]


  90. A view of the parallel computing landscape. [Citation Graph (, )][DBLP]


Search in 0.007secs, Finished in 0.010secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002