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Kai-Yuan Jheng:
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- Kai-Yuan Jheng, Shyh-Jye Jou, An-Yeu Wu
A design flow for multiplierless linear-phase FIR filters: from system specification to Verilog code. [Citation Graph (0, 0)][DBLP] ISCAS (5), 2004, pp:293-296 [Conf]
- Kai-Yuan Jheng, Yi-Chiuan Wang, An-Yeu Wu, Hen-Wai Tsao
DSP engine design for LINC wireless transmitter systems. [Citation Graph (0, 0)][DBLP] ISCAS, 2006, pp:- [Conf]
Traffic- and Thermal-Aware Run-Time Thermal Management Scheme for 3D NoC Systems. [Citation Graph (, )][DBLP]
Multilevel Linc System Design for Power Efficiency Enhancement. [Citation Graph (, )][DBLP]
A Shortened Impulse Response Filter (SIRF) Scheme for Cost-Effective Echo Canceller Design of 10GBase-T Ethernet System. [Citation Graph (, )][DBLP]
On-Line MSR-CORDIC VLSI Architecture with Applications to Cost-Efficient Rotation-Based Adaptive Filtering Systems. [Citation Graph (, )][DBLP]
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