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Shu-Hsuan Chou:
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Publications of Author
- Jui-Chin Chu, Wei-Chun Ku, Shu-Hsuan Chou, Tien-Fu Chen, Jiun-In Guo
An Embedded Coherent-Multithreading Multimedia Processor and Its Programming Model. [Citation Graph (0, 0)][DBLP] DAC, 2007, pp:652-657 [Conf]
NUDA: a non-uniform debugging architecture and non-intrusive race detection for many-core. [Citation Graph (, )][DBLP]
No cache-coherence: a single-cycle ring interconnection for multi-core L1-NUCA sharing on 3D chips. [Citation Graph (, )][DBLP]
RunAssert: A non-intrusive run-time assertion for parallel programs debugging. [Citation Graph (, )][DBLP]
Collaborative Multithreading: An Open Scalable Processor Architecture for Embedded Multimedia Applications. [Citation Graph (, )][DBLP]
dIP: A Non-intrusive Debugging IP for Dynamic Data Race Detection in Many-Core. [Citation Graph (, )][DBLP]
VeriC: A semi-hardware description language to bridge the gap between ESL design and RTL models. [Citation Graph (, )][DBLP]
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