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Shu-Hsuan Chou: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Jui-Chin Chu, Wei-Chun Ku, Shu-Hsuan Chou, Tien-Fu Chen, Jiun-In Guo
    An Embedded Coherent-Multithreading Multimedia Processor and Its Programming Model. [Citation Graph (0, 0)][DBLP]
    DAC, 2007, pp:652-657 [Conf]

  2. NUDA: a non-uniform debugging architecture and non-intrusive race detection for many-core. [Citation Graph (, )][DBLP]


  3. No cache-coherence: a single-cycle ring interconnection for multi-core L1-NUCA sharing on 3D chips. [Citation Graph (, )][DBLP]


  4. RunAssert: A non-intrusive run-time assertion for parallel programs debugging. [Citation Graph (, )][DBLP]


  5. Collaborative Multithreading: An Open Scalable Processor Architecture for Embedded Multimedia Applications. [Citation Graph (, )][DBLP]


  6. dIP: A Non-intrusive Debugging IP for Dynamic Data Race Detection in Many-Core. [Citation Graph (, )][DBLP]


  7. VeriC: A semi-hardware description language to bridge the gap between ESL design and RTL models. [Citation Graph (, )][DBLP]


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