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Damu Radhakrishnan: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Yong Liu, Edmund Ming-Kit Lai, A. Benjamin Premkumar, Damu Radhakrishnan
    A Low-Power Pipelined Implementation of 2D Discrete Wavelet Transform. [Citation Graph (0, 0)][DBLP]
    ESA/VLSI, 2004, pp:40-46 [Conf]
  2. R. V. Menon, S. Chennupati, Naveen K. Samala, Damu Radhakrishnan, Baback A. Izadi
    Power Optimized Combinational Logic Design. [Citation Graph (0, 0)][DBLP]
    Embedded Systems and Applications, 2003, pp:223-227 [Conf]
  3. R. V. Menon, S. Chennupati, Naveen K. Samala, Damu Radhakrishnan, Baback A. Izadi
    Switching Activity Minimization in Combinational Logic Design. [Citation Graph (0, 0)][DBLP]
    ESA/VLSI, 2004, pp:47-53 [Conf]
  4. S. Castillo, Naveen K. Samala, K. Manwaring, Baback A. Izadi, Damu Radhakrishnan
    Experimental Analysis of Batteries Under Continuous and Intermittent Operations. [Citation Graph (0, 0)][DBLP]
    ESA/VLSI, 2004, pp:18-24 [Conf]
  5. Jayapreetha Natesan, Damu Radhakrishnan
    A Novel Bus Encoding Technique for Low Power VLSI. [Citation Graph (0, 0)][DBLP]
    ESA/VLSI, 2004, pp:54-62 [Conf]
  6. Naveen K. Samala, Damu Radhakrishnan, Baback A. Izadi
    A Low Energy Deep Sub-Micron Bus Coding Technique. [Citation Graph (0, 0)][DBLP]
    ESA/VLSI, 2004, pp:25-30 [Conf]
  7. Saumya Uppaluri, Baback A. Izadi, Damu Radhakrishnan
    Low-Power Dynamic Scheduling in Heterogeneous Systems. [Citation Graph (0, 0)][DBLP]
    Embedded Systems and Applications, 2003, pp:261-267 [Conf]
  8. Jayapreetha Natesan, Damu Radhakrishnan
    Shift Invert Coding (SINV) for Low Power VLSI. [Citation Graph (0, 0)][DBLP]
    DSD, 2004, pp:190-194 [Conf]
  9. A. P. Preethy, Damu Radhakrishnan, Amos Omondi
    A high performance RNS multiply-accumulate unit. [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2001, pp:145-148 [Conf]
  10. A. P. Preethy, Damu Radhakrishnan, Amos Omondi
    Fault-tolerance scheme for an RNS MAC: performance and cost analysis. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 2001, pp:717-720 [Conf]
  11. Ali Feizi, Damu Radhakrishnan
    Multiple Output Pass Networks: Design and Testing. [Citation Graph (0, 0)][DBLP]
    ITC, 1985, pp:907-911 [Conf]
  12. Damu Radhakrishnan, A. P. Preethy
    A Parallel Approach to Direct Analog-to-Residue Conversion. [Citation Graph (0, 0)][DBLP]
    Inf. Process. Lett., 1999, v:69, n:5, pp:249-252 [Journal]

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