The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Marcello Chiaberge: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Roberto Gaudino, Vito De Feo, Marcello Chiaberge, Claudio Sansoè
    An FPGA-based Node Controller for a High Capacity WDM Optical Packet Network. [Citation Graph (0, 0)][DBLP]
    FPL, 2002, pp:1139-1143 [Conf]
  2. Marcello Chiaberge, G. Di Bene, S. Di Pascoli, R. Lambert, Beatrice Lazzerini, Adriana Maggiore, Leonardo Maria Reyneri
    EL-SIM: a Development Environment for Neuro-Fuzzy Intelligent Controllers. [Citation Graph (0, 0)][DBLP]
    IWANN, 1995, pp:666-672 [Conf]
  3. Marcello Chiaberge, Dante Del Corso, Francesco Gregoretti, Leonardo Maria Reyneri
    A Neural Network Chip Using CPWM Modulation. [Citation Graph (0, 0)][DBLP]
    IWANN, 1993, pp:420-425 [Conf]
  4. Leonardo Maria Reyneri, Marcello Chiaberge, Dante Del Corso
    Using Coherent Pulse Width And Edge Modulations In Artificial Neural Systems. [Citation Graph (0, 0)][DBLP]
    Int. J. Neural Syst., 1993, v:4, n:4, pp:407-418 [Journal]
  5. Leonardo Maria Reyneri, Marcello Chiaberge, Luciano Lavagno, Begoña Pino, E. Miranda
    Simulink-Based HW/SW Codesign of Embedded Neuro-Fuzzy Systems. [Citation Graph (0, 0)][DBLP]
    Int. J. Neural Syst., 2000, v:10, n:3, pp:211-226 [Journal]

Search in 0.002secs, Finished in 0.003secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002