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Publications of Author

1. Tran Minh Quang, Shigeru Oyanagi, Katsuhiro Yamazaki
   ExMiner: An Efficient Algorithm for Mining Top-K Frequent Patterns. [Citation Graph (0, 0)][DBLP]
   ADMA, 2006, pp:436-447 [Conf]
   
2. Yasushi Kawakura, Shigeru Oyanagi
   Improving the Performance of Global Communication on a 3D torus network. [Citation Graph (0, 0)][DBLP]
   ICPP (3), 1994, pp:193-196 [Conf]
   
3. Noboru Tanabe, Takashi Suzuoka, Sadao Nakamura, Yasushi Kawakura, Shigeru Oyanagi
   Base-m n-cube: High Performance Interconnection Networks for Highly Parallel Computer PRODIGY. [Citation Graph (0, 0)][DBLP]
   ICPP (1), 1991, pp:509-516 [Conf]
   
4. Tran Minh Quang, Shigeru Oyanagi, Katsuhiro Yamazaki
   Mining the K-Most Interesting Frequent Patterns Sequentially. [Citation Graph (0, 0)][DBLP]
   IDEAL, 2006, pp:620-628 [Conf]
   
5. Shinji Tomita, Kiyoshi Shibayama, Shigeru Oyanagi, Hiroshi Hagiwara
   Hardware Organization of a Low Level Parallel Processor. [Citation Graph (0, 0)][DBLP]
   IFIP Congress, 1977, pp:855-860 [Conf]
   
6. Kazuto Kubota, Akihiko Nakase, Shigeru Oyanagi
   Implementation and performance evaluation of dynamic scheduling for parallel decision tree generation. [Citation Graph (0, 0)][DBLP]
   IPDPS, 2001, pp:157- [Conf]
   
7. Shigeru Oyanagi, Kazuto Kubota, Akihiko Nakase
   Mining WWW Access Sequence by Matrix Clustering. [Citation Graph (0, 0)][DBLP]
   WEBKDD, 2002, pp:119-136 [Conf]
   
8. Hiroshi Hagiwara, Shinji Tomita, Shigeru Oyanagi, Kiyoshi Shibayama
   A Dynamically Microprogammable Computer with Low-Level Parallelism. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1980, v:29, n:7, pp:577-595 [Journal]
   
9. 
   Multi-stage Pipelining MD5 Implementations on FPGA with Data Forwarding. [Citation Graph (, )][DBLP]
   
   
10. 
    Three-stage pipeline implementation for SHA2 using data forwarding. [Citation Graph (, )][DBLP]