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Kiyoshi Shibayama: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Kiyoshi Shibayama, Shinji Tomita, Hiroshi Hagiwara, Katsuhiro Yamazaki, Toshiaki Kitamura
    Performance Evaluation and Improvement of a Dynamically Microprogrammable Computer with Low-Level Parallelism. [Citation Graph (0, 0)][DBLP]
    IFIP Congress, 1980, pp:181-186 [Conf]
  2. Shinji Tomita, Kiyoshi Shibayama, Shigeru Oyanagi, Hiroshi Hagiwara
    Hardware Organization of a Low Level Parallel Processor. [Citation Graph (0, 0)][DBLP]
    IFIP Congress, 1977, pp:855-860 [Conf]
  3. Shinji Tomita, Kiyoshi Shibayama, Toshiaki Kitamura, Toshiyuki Nakata, Hiroshi Hagiwara
    A User-Microprogrammable, Local Host Computer With Low-Level Parallelism [Citation Graph (0, 0)][DBLP]
    ISCA, 1983, pp:151-157 [Conf]
  4. Shinji Tomita, Kiyoshi Shibayama, Toshiyuki Nakata, Shinji Yuasa, Hiroshi Hagiwara
    A Computer with Low-Level Parallelism QA-2: Its Applications to 3-D Graphics and Prolog/Lisp Machines. [Citation Graph (0, 0)][DBLP]
    ISCA, 1986, pp:280-289 [Conf]
  5. Kiyoshi Shibayama, Masaaki Yamamoto, Hiroaki Hirata, Yasushi Konoh, Takanori Sanetoh, Hiroshi Hagiwara
    KPR: A Logic Programming Language-Oriented Parallel Machine. [Citation Graph (0, 0)][DBLP]
    LP, 1987, pp:113-131 [Conf]
  6. Atsushi Nunome, Hiroaki Hirata, Haruo Niimi, Kiyoshi Shibayama
    Performance evaluation of dynamic load balancing scheme with load prediction mechanism using the load growing acceleration for massively parallel computers. [Citation Graph (0, 0)][DBLP]
    Systems and Computers in Japan, 2004, v:35, n:11, pp:69-79 [Journal]
  7. Shuji Yamamura, Tadafumi Kadota, Hiroaki Hirata, Haruo Niimi, Kiyoshi Shibayama
    Evaluation of a data preload mechanism for a linked list structure. [Citation Graph (0, 0)][DBLP]
    Systems and Computers in Japan, 2002, v:33, n:3, pp:21-30 [Journal]
  8. Hiroshi Hagiwara, Shinji Tomita, Shigeru Oyanagi, Kiyoshi Shibayama
    A Dynamically Microprogammable Computer with Low-Level Parallelism. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1980, v:29, n:7, pp:577-595 [Journal]

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