Journals in DBLP

VLSI Signal Processing
2007, volume: 47, number: 2

1. Roman C. Kordasiewicz, Shahram Shirani
   On Hardware Implementations Of DCT and Quantization Blocks for H.264/AVC. [Citation Graph (0, 0)][DBLP]
   VLSI Signal Processing, 2007, v:47, n:2, pp:93-102 [Journal]
   
2. Albert M. K. Cheng, Zhubin Zhang
   Improving Web Server Performance with Adaptive Proxy Caching in Soft Real-time Mobile Applications. [Citation Graph (0, 0)][DBLP]
   VLSI Signal Processing, 2007, v:47, n:2, pp:103-115 [Journal]
   
3. H. Jeong, Y. Kim
   A Systolic Architecture and Implementation of Feedback Network for Blind Source Separation. [Citation Graph (0, 0)][DBLP]
   VLSI Signal Processing, 2007, v:47, n:2, pp:117-126 [Journal]
   
4. Andrew Kinane, Noel E. O'Connor
   Energy-efficient Hardware Accelerators for the SA-DCT and Its Inverse. [Citation Graph (0, 0)][DBLP]
   VLSI Signal Processing, 2007, v:47, n:2, pp:127-152 [Journal]
   
5. Chun Xue, Zili Shao, Edwin Hsing-Mean Sha
   Maximize Parallelism Minimize Overhead for Nested Loops via Loop Striping. [Citation Graph (0, 0)][DBLP]
   VLSI Signal Processing, 2007, v:47, n:2, pp:153-167 [Journal]
   
6. Albert Mo Kim Cheng, Feng Shang
   Priority-driven Coding and Transmission of Progressive JPEG Images for Real-Time Applications. [Citation Graph (0, 0)][DBLP]
   VLSI Signal Processing, 2007, v:47, n:2, pp:169-182 [Journal]
   
7. T. Sansaloni, A. Perez-Pascual, V. Torres, J. Valls
   Scheme for Reducing the Storage Requirements of FFT Twiddle Factors on FPGAs. [Citation Graph (0, 0)][DBLP]
   VLSI Signal Processing, 2007, v:47, n:2, pp:183-187 [Journal]