The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Gunar Schirner: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Gunar Schirner, Rainer Dömer
    Accurate yet fast modeling of real-time communication. [Citation Graph (0, 0)][DBLP]
    CODES+ISSS, 2006, pp:70-75 [Conf]
  2. Gunar Schirner, Trevor Harmon, Raymond Klefstad
    Late Demarshalling: A Technique for Efficient Multi-language Middleware for Embedded Systems. [Citation Graph (0, 0)][DBLP]
    CoopIS/DOA/ODBASE (2), 2004, pp:1155-1172 [Conf]
  3. Gunar Schirner, Rainer Dömer
    Quantitative analysis of transaction level models for the AMBA bus. [Citation Graph (0, 0)][DBLP]
    DATE, 2006, pp:230-235 [Conf]
  4. Gunar Schirner, Rainer Dömer
    Fast and accurate transaction level models using result oriented modeling. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2006, pp:363-368 [Conf]
  5. Gunar Schirner, Gautam Sachdeva, Andreas Gerstlauer, Rainer Dömer
    Embedded Software Development in a System-Level Design Flow. [Citation Graph (0, 0)][DBLP]
    IESS, 2007, pp:289-298 [Conf]

  6. Hardware-dependent software synthesis for many-core embedded systems. [Citation Graph (, )][DBLP]


  7. Abstract, Multifaceted Modeling of Embedded Processors for System Level Design. [Citation Graph (, )][DBLP]


  8. Automatic generation of hardware dependent software for MPSoCs from abstract system specifications. [Citation Graph (, )][DBLP]


  9. Introducing Preemptive Scheduling in Abstract RTOS Models using Result Oriented Modeling. [Citation Graph (, )][DBLP]


  10. Accurate timed RTOS model for transaction level modeling. [Citation Graph (, )][DBLP]


  11. Automatic Generation of Cycle-Approximate TLMs with Timed RTOS Model Support. [Citation Graph (, )][DBLP]


Search in 0.003secs, Finished in 0.004secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002