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Publications of Author

1. Jianhong Li, Laxmi Gewali, Henry Selvaraj, Muthukumar Venkatesan
   Hybrid Greedy/Face Routing for Ad-Hoc Sensor Network. [Citation Graph (0, 0)][DBLP]
   DSD, 2004, pp:574-578 [Conf]
   
2. Bharath Radhakrishnan, Muthukumar Venkatesan
   Multiple Voltage and Frequency Scheduling for Power Minimization. [Citation Graph (0, 0)][DBLP]
   DSD, 2003, pp:279-285 [Conf]
   
3. Muthukumar Venkatesan
   An Improved Input-Output Encoding Approach for Functional Decomposition. [Citation Graph (0, 0)][DBLP]
   DSD, 2001, pp:144-147 [Conf]
   
4. Muthukumar Venkatesan, Daggu Venkateshwar Rao
   Image Processing Algorithms on Reconfigurable Architecture using HandelC. [Citation Graph (0, 0)][DBLP]
   DSD, 2004, pp:218-226 [Conf]
   
5. Henry Selvaraj, Muthukumar Venkatesan
   A Reconfiguarable Printed Character Recognition System Using a Logic Synthesis Tool. [Citation Graph (0, 0)][DBLP]
   EUROMICRO, 1998, pp:10024-0 [Conf]
   
6. Muthukumar Venkatesan, Robert J. Bignall, Henry Selvaraj
   An Improved Column Compatibility Approach for Partition Based Functional Decomposition. [Citation Graph (0, 0)][DBLP]
   EUROMICRO, 2000, pp:1067-0 [Conf]
   
7. Muthukumar Venkatesan, Robert J. Bignall, Henry Selvaraj
   A variable partition approach for disjoint decomposition. [Citation Graph (0, 0)][DBLP]
   ISCAS (5), 2001, pp:157-162 [Conf]
   
8. Daggu Venkateshwar Rao, Muthukumar Venkatesan
   An Efficient Reconfigurable Architecture and Implementation of Edge Detection Algorithm using Handle-C. [Citation Graph (0, 0)][DBLP]
   ITCC (2), 2004, pp:846-0 [Conf]
   
9. Shyam Subramanian, Muthukumar Venkatesan
   Alternate Path Routing Algorithm for Traffic Engineering in the Internet. [Citation Graph (0, 0)][DBLP]
   ITCC, 2003, pp:367-0 [Conf]
   
10. S. Veeravalli, Laxmi Gewali, Muthukumar Venkatesan
    Construction of Power-Aware Diameter-Reduced Broadcast Trees. [Citation Graph (0, 0)][DBLP]
    ITCC (2), 2005, pp:668-674 [Conf]
    
11. Muthukumar Venkatesan, Henry Selvaraj
    Comparison of Heuristic Algorithms for Variable Partitioning in Circuit Implementation. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2003, pp:51-57 [Conf]