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J. A. Peperstraete:
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Publications of Author
- Chris Caerts, Rudy Lauwereins, J. A. Peperstraete
A Powerful Hig-Level Debugger for Parallel Programs. [Citation Graph (0, 0)][DBLP] ACPC, 1991, pp:54-64 [Conf]
- Manga J. P. Bekambo, J. A. Peperstraete
Control of a Dead-time Process by a Fuzzy Algorithm. [Citation Graph (0, 0)][DBLP] Applied Informatics, 1994, pp:143-145 [Conf]
- Marleen Adé, Rudy Lauwereins, J. A. Peperstraete
Data Memory Minimisation for Synchronous Data Flow Graphs Emulated on DSP-FPGA Targets. [Citation Graph (0, 0)][DBLP] DAC, 1997, pp:64-69 [Conf]
- Luc De Coster, Marc Engels, Rudy Lauwereins, J. A. Peperstraete
Global Approach for Compiled Bit-True Simulation of DSP Systems. [Citation Graph (0, 0)][DBLP] Euro-Par, Vol. II, 1996, pp:236-239 [Conf]
- Greet Bilsen, Rudy Lauwereins, J. A. Peperstraete
Compile-time scheduling with resource-constraints. [Citation Graph (0, 0)][DBLP] HICSS (2), 1995, pp:153-162 [Conf]
- Chris Caerts, Rudy Lauwereins, J. A. Peperstraete
PDG: A Portable Process-Level Debugger for CSP-Style Parallel Programs. [Citation Graph (0, 0)][DBLP] HICSS (2), 1994, pp:634-643 [Conf]
- Rudy Lauwereins, J. A. Peperstraete
An Integrated Software-Hardware Multiprocesor Project. [Citation Graph (0, 0)][DBLP] ICPP, 1987, pp:618-620 [Conf]
- L. J. Caluwaerts, J. Debacker, J. A. Peperstraete
A data flow architecture with a paged memory system. [Citation Graph (0, 0)][DBLP] ISCA, 1982, pp:120-127 [Conf]
- L. J. Caluwaerts, J. Debacker, J. A. Peperstraete
Implementing Streams on a Data Flow Computer System With Paged Memory [Citation Graph (0, 0)][DBLP] ISCA, 1983, pp:76-83 [Conf]
- Luc De Coster, Marleen Adé, Rudy Lauwereins, J. A. Peperstraete
Code Generation for Compiled Bit-True Simulation of DSP Applications. [Citation Graph (0, 0)][DBLP] ISSS, 1998, pp:9-14 [Conf]
- P. Wauters, Marc Engels, Rudy Lauwereins, J. A. Peperstraete
Cyclo-Dynamic Dataflow. [Citation Graph (0, 0)][DBLP] PDP, 1996, pp:319-326 [Conf]
- J. A. Peperstraete, R. Cuyvers, Rudy Lauwereins
A User-Adaptable Fault Tolerant Motor Controller using an Argument Flow Multiprocessor System. [Citation Graph (0, 0)][DBLP] Parallel and Distributed Computing and Systems, 1995, pp:317-320 [Conf]
- Geert Deconinck, Johan Vounckx, Rudy Lauwereins, J. A. Peperstraete
A User-triggered Checkpointing Library for Computationintensive Applications. [Citation Graph (0, 0)][DBLP] Parallel and Distributed Computing and Systems, 1995, pp:321-324 [Conf]
- Johan Vounckx, Geert Deconinck, Rudy Lauwereins, J. A. Peperstraete
A Loader for Injured Massively Parallel Regular Networks. [Citation Graph (0, 0)][DBLP] Parallel and Distributed Computing and Systems, 1995, pp:178-180 [Conf]
- Johan Vounckx, Geert Deconinck, Rudy Lauwereins, J. A. Peperstraete
Fault-Tolerant Compact Routing Based on Reduced Structural Information in Wormhole-Switching Based Networks. [Citation Graph (0, 0)][DBLP] SIROCCO, 1994, pp:125-148 [Conf]
- Rudy Lauwereins, Marc Engels, Marleen Adé, J. A. Peperstraete
Grape-II: A System-Level Prototyping Environment for DSP Applications. [Citation Graph (0, 0)][DBLP] IEEE Computer, 1995, v:28, n:2, pp:35-43 [Journal]
- Valeriu Beiu, J. A. Peperstraete, Joos Vandewalle, Rudy Lauwereins
Closse Approximations of Sigmoid Functions by Sum of Step for VLSI Implementation of Neural Networks. [Citation Graph (0, 0)][DBLP] Sci. Ann. Cuza Univ., 1994, v:3, n:, pp:5-34 [Journal]
- Marc Engels, Rudy Lauwereins, J. A. Peperstraete
Rapid Prototyping for DSP Systems with Multiprocessors. [Citation Graph (0, 0)][DBLP] IEEE Design & Test of Computers, 1991, v:8, n:2, pp:52-62 [Journal]
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