The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Tetsuya Asai: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Kazuki Nakada, Tetsuya Asai, Hatsuo Hayashi
    Burst Synchronization in Two Pulse-Coupled Resonate-and-Fire Neuron Circuits. [Citation Graph (0, 0)][DBLP]
    IFIP PPAI, 2006, pp:285-294 [Conf]
  2. Tetsuya Asai, Masato Koutani, Yoshihito Amemiya
    An Analog-Digital Hybrid CMOS Circuit for Two-Dimensional Motion Detection with Correlation Neural Networks. [Citation Graph (0, 0)][DBLP]
    IJCNN (3), 2000, pp:494-499 [Conf]
  3. Kazuki Nakada, Tetsuya Asai, Yoshihito Amemiya
    An analog CMOS chip implementing a CNN-based locomotion controller for quadruped walking robots. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 2004, pp:1-4 [Conf]
  4. Kazuki Nakada, Tetsuya Asai, Yoshihito Amemiya
    Analog CMOS implementation of a neuromorphic oscillator with current-mode low-pass filters. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 2005, pp:1923-1926 [Conf]
  5. Takahide Oya, Tetsuya Asai, Yoshihito Amemiya, Alexandre Schmid, Yusuf Leblebici
    Single-electron circuit for inhibitory spiking neural network with fault-tolerant architecture. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 2005, pp:2535-2538 [Conf]
  6. Tetsuya Asai, Yoshihito Amemiya
    Biomorphic Analog Devices based on Reaction-Diffusion Systems. [Citation Graph (0, 0)][DBLP]
    ISMVL, 2003, pp:197-0 [Conf]
  7. Takahide Oya, Alexandre Schmid, Tetsuya Asai, Yusuf Leblebici, Yoshihito Amemiya
    On the fault tolerance of a clustered single-electron neural network for differential enhancement. [Citation Graph (0, 0)][DBLP]
    IEICE Electronic Express, 2005, v:2, n:3, pp:76-80 [Journal]
  8. Yusuke Kanazawa, Tetsuya Asai, Tetsuya Hirose, Yoshihito Amemiya
    A MOS circuit for bursting neural oscillators with excitable oregonators. [Citation Graph (0, 0)][DBLP]
    IEICE Electronic Express, 2004, v:1, n:4, pp:73-76 [Journal]
  9. Hiroshi Matsubara, Tetsuya Asai, Tetsuya Hirose, Yoshihito Amemiya
    Reaction-diffusion chip implementing excitable lattices with multiple-valued cellular automata. [Citation Graph (0, 0)][DBLP]
    IEICE Electronic Express, 2004, v:1, n:9, pp:248-252 [Journal]
  10. Kazuki Nakada, Tetsuya Asai, Hatsuo Hayashi
    Analog Vlsi Implementation of Resonate-and-fire Neuron. [Citation Graph (0, 0)][DBLP]
    Int. J. Neural Syst., 2006, v:16, n:6, pp:445-456 [Journal]
  11. Tetsuya Asai, Tomoki Fukai, Shigeru Tanaka
    A subthreshold MOS circuit for the Lotka-Volterra neural network producing the winners-share-all solution. [Citation Graph (0, 0)][DBLP]
    Neural Networks, 1999, v:12, n:2, pp:211-216 [Journal]
  12. Tetsuya Asai, Masayuki Ikebe, Tetsuya Hirose, Yoshihito Amemiya
    A quadrilateral-object composer for binary images with reaction-diffusion cellular automata. [Citation Graph (0, 0)][DBLP]
    Parallel Algorithms Appl., 2005, v:20, n:1, pp:57-67 [Journal]
  13. Ken Ueno, Tetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya
    Floating millivolt reference for PTAT current generation in Subthreshold MOS LSIs. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2007, pp:3748-3751 [Conf]
  14. Kazuki Nakada, Tetsuya Asai, Tetsuya Hirose, Hatsuo Hayashi, Yoshihito Amemiya
    A subthreshold CMOS circuit for a piecewise linear neuromorphic oscillator with current-mode low-pass filters. [Citation Graph (0, 0)][DBLP]
    Neurocomputing, 2007, v:71, n:1-3, pp:3-12 [Journal]

  15. A 300 nW, 7 ppm/degreeC CMOS voltage reference circuit based on subthreshold MOSFETs. [Citation Graph (, )][DBLP]


  16. Analog CMOS Circuits Implementing Neural Segmentation Model Based on Symmetric STDP Learning. [Citation Graph (, )][DBLP]


  17. Noise-Tolerant Analog Circuits for Sensory Segmentation Based on Symmetric STDP Learning. [Citation Graph (, )][DBLP]


  18. Exploiting Temporal Noises and Device Fluctuations in Enhancing Fidelity of Pulse-Density Modulator Consisting of Single-Electron Neural Circuits. [Citation Graph (, )][DBLP]


  19. Neuromorphic CMOS Circuits implementing a Novel Neural Segmentation Model based on Symmetric STDP Learning. [Citation Graph (, )][DBLP]


  20. Stochastic Synchronization and Array-Enhanced Coherence Resonance in a Bio-inspired Chemical Sensor Array. [Citation Graph (, )][DBLP]


  21. Pulse-Density Modulation with an Ensemble of Single-Electron Circuits Employing Neuronal Heterogeneity to Achieve High Temporal Resolution. [Citation Graph (, )][DBLP]


Search in 0.003secs, Finished in 0.004secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002