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Y. N. Srikant: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Rahul Nagpal, Y. N. Srikant
    Integrated temporal and spatial scheduling for extended operand clustered VLIW processors. [Citation Graph (0, 0)][DBLP]
    Conf. Computing Frontiers, 2004, pp:457-470 [Conf]
  2. K. Ananda Vardhan, Y. N. Srikant
    Transition aware scheduling: increasing continuous idle-periods in resource units. [Citation Graph (0, 0)][DBLP]
    Conf. Computing Frontiers, 2005, pp:189-198 [Conf]
  3. Kapil Vaswani, Matthew J. Thazhuthaveetil, Y. N. Srikant
    A Programmable Hardware Path Profiler. [Citation Graph (0, 0)][DBLP]
    CGO, 2005, pp:217-228 [Conf]
  4. Kapil Vaswani, Matthew J. Thazhuthaveetil, Y. N. Srikant, P. J. Joseph
    Microarchitecture Sensitive Empirical Models for Compiler Optimizations. [Citation Graph (0, 0)][DBLP]
    CGO, 2007, pp:131-143 [Conf]
  5. J. Prakash, C. Sandeep, Priti Shankar, Y. N. Srikant
    A Simple and Fast Scheme for Code Compression for VLIW Processors. [Citation Graph (0, 0)][DBLP]
    DCC, 2003, pp:444- [Conf]
  6. Rahul Nagpal, Y. N. Srikant
    Compiler-assisted leakage energy optimization for clustered VLIW architectures. [Citation Graph (0, 0)][DBLP]
    EMSOFT, 2006, pp:233-241 [Conf]
  7. D. V. Ravindra, Y. N. Srikant
    Improved Preprocessing Methods for Modulo Scheduling Algorithms. [Citation Graph (0, 0)][DBLP]
    HiPC, 2002, pp:485-494 [Conf]
  8. Rahul Nagpal, Y. N. Srikant
    Exploring Energy-Performance Trade-Offs for Heterogeneous Interconnect Clustered VLIW Processors. [Citation Graph (0, 0)][DBLP]
    HiPC, 2006, pp:497-508 [Conf]
  9. Y. N. Srikant
    Parallel Parsing of Arithmetic Expressions. [Citation Graph (0, 0)][DBLP]
    ICPP, 1987, pp:589-591 [Conf]
  10. V. Viswanathan, Y. N. Srikant
    Parallel Incremental LR Parsing. [Citation Graph (0, 0)][DBLP]
    ICPP (3), 1991, pp:328-329 [Conf]
  11. Rahul Nagpal, Y. N. Srikant
    A Graph Matching Based Integrated Scheduling Framework for Clustered VLIW Processors. [Citation Graph (0, 0)][DBLP]
    ICPP Workshops, 2004, pp:530-537 [Conf]
  12. S. R. Prakash, Y. N. Srikant
    Hyperplane Partitioning: An Approach to Global Data Partitioning for Distributed Memory Machines. [Citation Graph (0, 0)][DBLP]
    IPPS/SPDP, 1999, pp:744-0 [Conf]
  13. Sujit Kumar Chakrabarti, Y. N. Srikant
    Specification Based Regression Testing Using Explicit State Space Enumeration. [Citation Graph (0, 0)][DBLP]
    ICSEA, 2006, pp:20- [Conf]
  14. M. P. Subodh Kumar, Y. N. Srikant
    Graphical simulation of Petri Nets. [Citation Graph (0, 0)][DBLP]
    Computers & Graphics, 1986, v:10, n:3, pp:225-228 [Journal]
  15. Y. N. Srikant, D. Vidyasagar, Lalit M. Patnaik
    An interactive graphics system for 2-D drawing and design. [Citation Graph (0, 0)][DBLP]
    Computers & Graphics, 1982, v:6, n:1, pp:23-27 [Journal]
  16. Vijay Gehlot, Y. N. Srikant
    An Interpreter for SLIPS - An Applicative Language Based on Lambda-Calculus. [Citation Graph (0, 0)][DBLP]
    Comput. Lang., 1986, v:11, n:1, pp:1-13 [Journal]
  17. H. K. Haripriyan, Y. N. Srikant, Priti Shankar
    A Compiler Writing System Based on Affix Grammars. [Citation Graph (0, 0)][DBLP]
    Comput. Lang., 1988, v:13, n:1, pp:1-11 [Journal]
  18. Arvind M. Murching, Y. V. Prasad, Y. N. Srikant
    Incremental Recursive Descent Parsing. [Citation Graph (0, 0)][DBLP]
    Comput. Lang., 1990, v:15, n:4, pp:193-204 [Journal]
  19. Arvind M. Murching, Y. N. Srikant
    Incremental Attribute Evaluation Through Recursive Procedures. [Citation Graph (0, 0)][DBLP]
    Comput. Lang., 1989, v:14, n:4, pp:225-237 [Journal]
  20. R. Venugopal, Y. N. Srikant
    Heuristic Chaining in Directed Acyclic Graphs. [Citation Graph (0, 0)][DBLP]
    Comput. Lang., 1993, v:19, n:3, pp:169-184 [Journal]
  21. R. Venugopal, Y. N. Srikant
    Scheduling Expression Trees with Reusable Registers on Delayed-Load Architectures. [Citation Graph (0, 0)][DBLP]
    Comput. Lang., 1995, v:21, n:1, pp:49-65 [Journal]
  22. N. Viswanathan, Y. N. Srikant
    Parallel Incremental LR Parsing. [Citation Graph (0, 0)][DBLP]
    Comput. Lang., 1994, v:20, n:3, pp:151-175 [Journal]
  23. K. H. Shekhar, Y. N. Srikant
    Linda Sub System on Transputers. [Citation Graph (0, 0)][DBLP]
    Comput. Lang., 1993, v:18, n:2, pp:125-136 [Journal]
  24. U. Nagaraj Shenoy, Y. N. Srikant, Vijay P. Bhatkar
    An Automatic Parallelization Framework for Multicomputers. [Citation Graph (0, 0)][DBLP]
    Comput. Lang., 1994, v:20, n:3, pp:135-150 [Journal]
  25. Kapil Vaswani, Y. N. Srikant
    Dynamic recompilation and profile-guided optimisations for a .NET JIT compiler. [Citation Graph (0, 0)][DBLP]
    IEE Proceedings - Software, 2003, v:150, n:5, pp:296-302 [Journal]
  26. Alan Gibbons, Y. N. Srikant
    A Class of Problems Efficiently Solvable on Mesh-Connected Computers Including Dynamic Expression Evaluation. [Citation Graph (0, 0)][DBLP]
    Inf. Process. Lett., 1989, v:32, n:6, pp:305-311 [Journal]
  27. Y. N. Srikant, Priti Shankar
    Parallel parsing of programming languages. [Citation Graph (0, 0)][DBLP]
    Inf. Sci., 1987, v:43, n:1-2, pp:55-83 [Journal]
  28. R. Venugopal, Y. N. Srikant
    Scheduling expression trees for delayed-load architectures. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 2002, v:48, n:4-5, pp:151-173 [Journal]
  29. Y. N. Srikant, Priti Shankar
    A new parallel algorithm for parsing arithmetic infix expressions. [Citation Graph (0, 0)][DBLP]
    Parallel Computing, 1987, v:4, n:3, pp:291-304 [Journal]
  30. Vineeth Kumar Paleri, Y. N. Srikant, Priti Shankar
    Partial redundancy elimination: a simple, pragmatic, and provably correct algorithm. [Citation Graph (0, 0)][DBLP]
    Sci. Comput. Program., 2003, v:48, n:1, pp:1-20 [Journal]
  31. Vineeth Kumar Paleri, Y. N. Srikant, Priti Shankar
    A Simple Algorithm for Partial Redundancy Elimination. [Citation Graph (0, 0)][DBLP]
    SIGPLAN Notices, 1998, v:33, n:12, pp:35-43 [Journal]
  32. Y. N. Srikant, D. V. Ravindra
    Effective Parameterization of Architectural Registers for Register Allocation Alogorithms. [Citation Graph (0, 0)][DBLP]
    SIGPLAN Notices, 2000, v:35, n:6, pp:37-46 [Journal]
  33. Y. N. Srikant
    Parallel Parsing of Arithmetic Expressions. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1990, v:39, n:1, pp:130-132 [Journal]
  34. Rahul Nagpal, Arvind Madan, Amrutur Bhardwaj, Y. N. Srikant
    INTACTE: an interconnect area, delay, and energy estimation tool for microarchitectural explorations. [Citation Graph (0, 0)][DBLP]
    CASES, 2007, pp:238-247 [Conf]
  35. Rathijit Sen, Y. N. Srikant
    Executable Analysis using Abstract Interpretation with Circular Linear Progressions. [Citation Graph (0, 0)][DBLP]
    MEMOCODE, 2007, pp:39-48 [Conf]

  36. The Hot Path SSA Form: Extending the Static Single Assignment Form for Speculative Optimizations. [Citation Graph (, )][DBLP]


  37. Compiler-directed frequency and voltage scaling for a multiple clock domain microarchitecture. [Citation Graph (, )][DBLP]


  38. Profiling k-Iteration Paths: A Generalization of the Ball-Larus Profiling Algorithm. [Citation Graph (, )][DBLP]


  39. WCET estimation for executables in the presence of data caches. [Citation Graph (, )][DBLP]


  40. Probabilistic modeling of data cache behavior. [Citation Graph (, )][DBLP]


  41. Compiler-Assisted Instruction Decoder Energy Optimization for Clustered VLIW Architectures. [Citation Graph (, )][DBLP]


  42. Partial Flow Sensitivity. [Citation Graph (, )][DBLP]


  43. Genetic algorithm based automatic data partitioning scheme for HPF. [Citation Graph (, )][DBLP]


  44. Improving flow-insensitive solutions for non-separable dataflow problems. [Citation Graph (, )][DBLP]


  45. Accelerating multi-core simulators. [Citation Graph (, )][DBLP]


  46. Register File Energy Optimization for Snooping Based Clustered VLIW Architectures. [Citation Graph (, )][DBLP]


  47. Analysis of application partitioning for massively multiplayer mobile gaming. [Citation Graph (, )][DBLP]


  48. Test sequence computation for regression testing of reactive systems. [Citation Graph (, )][DBLP]


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