Conferences in DBLP

Architektur von Rechensystemen (arcs)
1997 (conf/arcs/1997)

1. Michael J. Flynn
   Time and Area Optimization in Processor Architecture. [Citation Graph (0, 0)][DBLP]
   ARCS, 1997, pp:1-11 [Conf]
   
2. Mario Dal Cin, Wolfgang Hohl, Volkmar Sieh
   Hardware-Supported Fault Tolerance for Multiprocessors. [Citation Graph (0, 0)][DBLP]
   ARCS, 1997, pp:13-22 [Conf]
   
3. Dieter Brökelmann
   Modulare Multiprozessor-Parallelrechnerarchitektur für ein Fuzzy-System. [Citation Graph (0, 0)][DBLP]
   ARCS, 1997, pp:23-31 [Conf]
   
4. Ronald Moore, Bernd Klauer, Klaus Waldschmidt
   Compiler Technology for Two Novel Computer Architectures. [Citation Graph (0, 0)][DBLP]
   ARCS, 1997, pp:33-42 [Conf]
   
5. Andreas Döring, Wolfgang Obelöer, Gunther Lustig
   Architektur eines flexiblen Routers für Hochleistungsnetzwerke. [Citation Graph (0, 0)][DBLP]
   ARCS, 1997, pp:43-52 [Conf]
   
6. Andreas Wespi, Ernst H. Rothauser
   History-Based Batch Job Scheduling on Workstation Clusters. [Citation Graph (0, 0)][DBLP]
   ARCS, 1997, pp:53-62 [Conf]
   
7. H. Kuefner, H. Baehring
   Architecture and Modelling of a Fault-tolerant Workstation Cluster. [Citation Graph (0, 0)][DBLP]
   ARCS, 1997, pp:63-73 [Conf]
   
8. Martina Zitterbart, Till Harbaum, Detlef Meier, Dieter Brökelmann
   HeaRT: High Performance Routing Table Look up. [Citation Graph (0, 0)][DBLP]
   ARCS, 1997, pp:75-84 [Conf]
   
9. Manuel Duque-Antón, Ralf Günther, Thomas Meuser, Josef Wasel, Raschid Karabek
   Object-oriented Software Architecture for Distributed Systems. [Citation Graph (0, 0)][DBLP]
   ARCS, 1997, pp:85-94 [Conf]
   
10. Wolfgang Küchlin, Gerhard Gruhler, Andreas Speck, Thomas Lumpp
    HighRobot: Distributed Objekt-Oriented Real-Time Systems. [Citation Graph (0, 0)][DBLP]
    ARCS, 1997, pp:95-104 [Conf]
    
11. Steffen Dolling, Dirk Timmermann, Andreas Wassatsch
    Digit-On-Line-Architekturen und VHDL-Cores für die Umsetzung von schnellen seriellen MSD-First-Signalverarbeitungsalgorithmen. [Citation Graph (0, 0)][DBLP]
    ARCS, 1997, pp:105-114 [Conf]
    
12. Steffen Dolling, Rüdiger Ide, Dirk Timmermann, Gerhard Kutschke
    Online-Prozessor für ein Echtzeit-Bildverarbeitungssystem. [Citation Graph (0, 0)][DBLP]
    ARCS, 1997, pp:115-124 [Conf]
    
13. Matjaz Colnaric, Wolfgang A. Halang, Markus Wannemacher
    Design of Peripheral Interfaces for Embedded Control Systems. [Citation Graph (0, 0)][DBLP]
    ARCS, 1997, pp:125-132 [Conf]
    
14. Christian Siemers, Dietmar P. F. Möller
    Der>S<puter: Ein dynamisch rekonfigurierbares Mikroarchitekturmodell zur Erreichung des maximalen Instruktionsparallelitätsgrades. [Citation Graph (0, 0)][DBLP]
    ARCS, 1997, pp:133-142 [Conf]
    
15. Reiner W. Hartenstein, Jürgen Becker, Michael Herz, Ulrich Nageldinger
    A Novel Universal Sequencer Hardware. [Citation Graph (0, 0)][DBLP]
    ARCS, 1997, pp:143-152 [Conf]
    
16. Jens-Peter Akelbein, Hans Christoph Zeidler
    Der File Controller - Schnittstelle zu einem dateiorientierten Massenspeicher. [Citation Graph (0, 0)][DBLP]
    ARCS, 1997, pp:153-162 [Conf]
    
17. Gert Markwardt, Günter Kemnitz, Rainer G. Spallek
    A RISC Processor with Extended Forwarding. [Citation Graph (0, 0)][DBLP]
    ARCS, 1997, pp:163-169 [Conf]
    
18. Winfried Grünewald, Theo Ungerer
    Die mehrfädige Prozessorarchitektur Rhamma. [Citation Graph (0, 0)][DBLP]
    ARCS, 1997, pp:171-180 [Conf]
    
19. Edward E. E. Frietman, Ramon J. Ernst, Roy Crosbie, Masao Shimoji
    Features of optical interconnects in distributed-shared memory organized MIMD architectures: the ultimate goal. [Citation Graph (0, 0)][DBLP]
    ARCS, 1997, pp:181-189 [Conf]
    
20. Jürgen Brehm
    Modelling Massively Parallel Scientific Codes. [Citation Graph (0, 0)][DBLP]
    ARCS, 1997, pp:191-200 [Conf]
    
21. Uwe Hinsberger, Reiner Kolla, Markus Wild
    A parallel hybrid approach to hard optimization problems. [Citation Graph (0, 0)][DBLP]
    ARCS, 1997, pp:201-210 [Conf]
    
22. Michael Eberl, Hermann Hellwagner, Wolfgang Karl, Markus Leberecht
    Sicherheit und Effizienz in einer Active-Message-Kommunikationsschicht. [Citation Graph (0, 0)][DBLP]
    ARCS, 1997, pp:211-220 [Conf]
    
23. Claus Aßmann
    A Language for Concurrent Processing based on Petri Nets. [Citation Graph (0, 0)][DBLP]
    ARCS, 1997, pp:221-230 [Conf]
    
24. Thomas Setz
    Integration von Softwarefehlertoleranz in mit LIPS verteilten Anwendungen. [Citation Graph (0, 0)][DBLP]
    ARCS, 1997, pp:231-240 [Conf]
    
25. Christian Mittasch
    BPAFrame Phase 2 - a Framework for Workflow Management. [Citation Graph (0, 0)][DBLP]
    ARCS, 1997, pp:241-250 [Conf]
    
26. Lars Reuther, Hermann Härtig
    Kapselung mobiler Programme. [Citation Graph (0, 0)][DBLP]
    ARCS, 1997, pp:251-260 [Conf]
    
27. Frank Golatowski, Dirk Timmermann
    EVASCAN: Methodik zur Evaluierung, Analyse und zum Test von Echtzeitsystemen und Echtzeitbetriebssystemen. [Citation Graph (0, 0)][DBLP]
    ARCS, 1997, pp:261-270 [Conf]
    
28. Jörg Cordsen
    Flexible und Effiziente Kommunikationsunterstützung für die Programmierung von Rechnerverbunden. [Citation Graph (0, 0)][DBLP]
    ARCS, 1997, pp:271-280 [Conf]
    
29. Natalia G. Churbanova, Marina A. Trapeznikova
    Parallel Simulation of Oil Production using explicit and implicit Algorithms. [Citation Graph (0, 0)][DBLP]
    ARCS, 1997, pp:281-290 [Conf]
    
30. Weifeng Lu, Wei Li
    Information Agency Framework: A Novel Architecture of Internet Information Service. [Citation Graph (0, 0)][DBLP]
    ARCS, 1997, pp:291-300 [Conf]
    
31. Giovanni Chiola, Giuseppe Ciaccio
    Architectural Issues and Preliminary Benchmarking of a Low-cost Network of Workstations based on Active Messages. [Citation Graph (0, 0)][DBLP]
    ARCS, 1997, pp:301-310 [Conf]