Journals in DBLP
Yuanyuan Yang , Gerald M. Masson Broadcast Ring Sandwich Networks. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1995, v:44, n:10, pp:1169-1180 [Journal ] Wei-Kuo Liao , Chung-Ta King Valved Routing: Efficient Flow Control for Adaptive Nonminimal Routing in Interconnection Networks. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1995, v:44, n:10, pp:1181-1193 [Journal ] Theodore Johnson Characterizing the Performance of Algorithms for Lock-Free Objects. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1995, v:44, n:10, pp:1194-1207 [Journal ] Frank T. Hady , Bernard L. Menezes The Performance of Crossbar-Based Binary Hypercubes. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1995, v:44, n:10, pp:1208-1215 [Journal ] Pierre Semal Refinable Bounds for Large Markov Chains. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1995, v:44, n:10, pp:1216-1222 [Journal ] Rafael H. Saavedra , Alan Jay Smith Measuring Cache and TLB Performance and Their Effect on Benchmark Runtimes. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1995, v:44, n:10, pp:1223-1235 [Journal ] Vincenzo Catania , Antonio Puliafito , Salvatore Riccobene , Lorenzo Vita Design and Performance Analysis of a Disk Array System. [Citation Graph (1, 0)][DBLP ] IEEE Trans. Computers, 1995, v:44, n:10, pp:1236-1247 [Journal ] Priyalal Kulasinghe , Ahmed El-Amawy On the Complexity of Optimal Bused Interconnections. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1995, v:44, n:10, pp:1248-1251 [Journal ] Mohamed Soufi , Yvon Savaria , F. Darlay , Bozena Kaminska Producing Reliable Initialization and Test of Sequential Circuits with Pseudorandom Vectors. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1995, v:44, n:10, pp:1251-1256 [Journal ] K. M. Sammut , S. R. Jones Arithmetic Unit Design for Neural Accelerators: Cost Performance Issues. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1995, v:44, n:10, pp:1256-1260 [Journal ] Dipanwita Roy Chowdhury , Idranil Sen Gupta , Parimal Pal Chaudhuri A Low-Cost High-Capacity Associative Memory Design Using Cellular Automata. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1995, v:44, n:10, pp:1260-1264 [Journal ]