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A. Rao :
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James Clifford , A. Rao A Simple, General Structure for Temporal Domains. [Citation Graph (12, 0)][DBLP ] Temporal Aspects in Information Systems, 1987, pp:17-28 [Conf ] A. Rao , Th. Haniotakis , Y. Tsiatouhas , V. Kaky A New Dynamic Circuit Design Technique for High Performance TSC Checker Implementations. [Citation Graph (0, 0)][DBLP ] IOLTS, 2004, pp:52-57 [Conf ] A. Rao , W. McIntyre , J. Parry , Un-Ku Moon , Gabor C. Temes Buck-boost switched-capacitor DC-DC voltage regulator using delta-sigma control loop. [Citation Graph (0, 0)][DBLP ] ISCAS (4), 2002, pp:743-746 [Conf ] A. Rao , Th. Haniotakis , Y. Tsiatouhas , H. Djemil The Use of Pre-Evaluation Phase in Dynamic CMOS Logic. [Citation Graph (0, 0)][DBLP ] ISVLSI, 2005, pp:270-271 [Conf ] N. Pinnawala , A. Rao Cocyclic Simplex Codes of Type alpha Over mmb Z4 and mmb Z2 s . [Citation Graph (0, 0)][DBLP ] IEEE Transactions on Information Theory, 2004, v:50, n:9, pp:2165-2169 [Journal ] A Path to Hadamard Matrices. [Citation Graph (, )][DBLP ] Distribution of Trace Values and Two-Weight, Self-orthogonal Codes over GF ( p , 2). [Citation Graph (, )][DBLP ] Search in 0.002secs, Finished in 0.003secs