The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Matthias Gruetzner: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Matthias Gruetzner
    Design for Testability for Wafer-Scale Integration Interconnect Systems Design and Test Methodology. [Citation Graph (0, 0)][DBLP]
    ITC, 1988, pp:146-152 [Conf]
  2. Tom W. Williams, Wilfried Daehn, Matthias Gruetzner, Corot W. Starke
    Comparison of Aliasing Errors for Primitive and Non-Primitive Polynomials. [Citation Graph (0, 0)][DBLP]
    ITC, 1986, pp:282-289 [Conf]
  3. André Ivanov, Corot W. Starke, Vinod K. Agarwal, Wilfried Daehn, Matthias Gruetzner, Tom W. Williams
    Iterative algorithms for computing aliasing probabilities. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1991, v:10, n:2, pp:260-265 [Journal]
  4. Tom W. Williams, Wilfried Daehn, Matthias Gruetzner, Corot W. Starke
    Bounds and analysis of aliasing errors in linear feedback shift registers. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1988, v:7, n:1, pp:75-83 [Journal]

Search in 0.002secs, Finished in 0.002secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002