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Wesley Peck:
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Publications of Author
- David L. Andrews, Ron Sass, Erik Anderson, Jason Agron, Wesley Peck, Jim Stevens, Fabrice Baijot, Ed Komp
The Case for High Level Programming Models for Reconfigurable Computers. [Citation Graph (0, 0)][DBLP] ERSA, 2006, pp:21-32 [Conf]
- Erik Anderson, Jason Agron, Wesley Peck, Jim Stevens, Fabrice Baijot, Ed Komp, Ron Sass, David L. Andrews
Enabling a Uniform Programming Model Across the Software/Hardware Boundary. [Citation Graph (0, 0)][DBLP] FCCM, 2006, pp:89-98 [Conf]
- Razali Jidin, David L. Andrews, Wesley Peck, Dan Chirpich, Kevin Stout, John M. Gauch
Evaluation of the Hybrid Multithreading Programming Model using Image Processing Transforms. [Citation Graph (0, 0)][DBLP] IPDPS, 2005, pp:- [Conf]
- Jason Agron, Wesley Peck, Erik Anderson, David L. Andrews, Ed Komp, Ron Sass, Fabrice Baijot, Jim Stevens
Run-Time Services for Hybrid CPU/FPGA Systems on Chip. [Citation Graph (0, 0)][DBLP] RTSS, 2006, pp:3-12 [Conf]
- David L. Andrews, Douglas Niehaus, Razali Jidin, Michael Finley, Wesley Peck, Michael Frisbie, Jorge L. Ortiz, Ed Komp, Peter J. Ashenden
Programming Models for Hybrid FPGA-CPU Computational Components: A Missing Link. [Citation Graph (0, 0)][DBLP] IEEE Micro, 2004, v:24, n:4, pp:42-53 [Journal]
- Wesley Peck, Erik Anderson, Jason Agron, Jim Stevens, Fabrice Baijot, David L. Andrews
Hthreads: A Computational Model for Reconfigurable Devices. [Citation Graph (0, 0)][DBLP] FPL, 2006, pp:1-4 [Conf]
Memory Hierarchy for MCSoPC Multithreaded Systems. [Citation Graph (, )][DBLP]
Supporting High Level Language Semantics Within Hardware Resident Threads. [Citation Graph (, )][DBLP]
Symmetric Multiprocessor Design for Hybrid CPU/FPGA SoCs. [Citation Graph (, )][DBLP]
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