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Arifur Rahman: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Arifur Rahman, Vijay Polavarapuv
    Evaluation of low-leakage design techniques for field programmable gate arrays. [Citation Graph (0, 0)][DBLP]
    FPGA, 2004, pp:23-30 [Conf]
  2. Arifur Rahman, Shamik Das, Anantha Chandrakasan, Rafael Reif
    Wiring requirement and three-dimensional integration of field-programmable gate arrays. [Citation Graph (0, 0)][DBLP]
    SLIP, 2001, pp:107-113 [Conf]
  3. Arifur Rahman
    Models for Full-Chip Power Dissipation in Field Programmable Gate Arrays and the Impact of Subthreshold Leakage Current. [Citation Graph (0, 0)][DBLP]
    VLSI, 2003, pp:97-106 [Conf]
  4. Arifur Rahman, Rafael Reif
    System-level performance evaluation of three-dimensional integrated circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2000, v:8, n:6, pp:671-678 [Journal]
  5. Arifur Rahman, Shamik Das, Anantha P. Chandrakasan, Rafael Reif
    Wiring requirement and three-dimensional integration technology for field programmable gate arrays. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2003, v:11, n:1, pp:44-54 [Journal]

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