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Publications of Author

1. Antonio García, Javier Ramírez, Uwe Meyer-Bäse, Encarnación Castillo, Antonio Lloris-Ruíz
   Efficient Embedded FPL Resource Usage for RNS-based Polyphase DWT Filter Banks. [Citation Graph (0, 0)][DBLP]
   FPL, 2005, pp:531-534 [Conf]
   
2. Luis Parrilla, Encarnación Castillo, Antonio García, Antonio Lloris-Ruíz
   Intellectual Property Protection for RNS Circuits on FPGAs. [Citation Graph (0, 0)][DBLP]
   FPL, 2004, pp:1139-1141 [Conf]
   
3. Daniel González, Luis Parrilla, Antonio García, Encarnación Castillo, Antonio Lloris-Ruíz
   Efficient Clock Distribution Scheme for VLSI RNS-Enabled Controllers. [Citation Graph (0, 0)][DBLP]
   PATMOS, 2005, pp:657-665 [Conf]
   
4. Encarnación Castillo, Luis Parrilla, Antonio García, Antonio Lloris, Uwe Meyer-Bäse
   IPP Watermarking Technique for IP Core Protection on FPL Devices. [Citation Graph (0, 0)][DBLP]
   FPL, 2006, pp:1-6 [Conf]
   
5. Encarnación Castillo, Uwe Meyer-Bäse, Antonio García, Luis Parrilla, Antonio Lloris
   IPP@HDL: Efficient Intellectual Property Protection Scheme for IP Cores. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. VLSI Syst., 2007, v:15, n:5, pp:578-591 [Journal]
   
6. 
   Exploiting Analog and Digital Reconfiguration for Smart Sensor Interfacing. [Citation Graph (, )][DBLP]
   
   
7. 
   Intellectual Property Protection of HDL IP Cores Through Automated Sognature Hosting. [Citation Graph (, )][DBLP]
   
   
8. 
   Enhancing ADC resolution through Field Programmable Analog Array dynamic reconfiguration. [Citation Graph (, )][DBLP]