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Meng-Chiou Wu:
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Publications of Author
- Rung-Bin Lin, Meng-Chiou Wu, Wei-Chiu Tseng, Ming-Hsine Kuo, Tsai-Ying Lin, Shr-Cheng Tsai
Design space exploration for minimizing multi-project wafer production cost. [Citation Graph (0, 0)][DBLP] ASP-DAC, 2006, pp:783-788 [Conf]
- Rung-Bin Lin, Da-Wei Hsu, Ming-Hsine Kuo, Meng-Chiou Wu
Reticle Exposure Plans for Multi-Project Wafers. [Citation Graph (0, 0)][DBLP] DDECS, 2007, pp:341-344 [Conf]
- Meng-Chiou Wu, Rung-Bin Lin
Reticle floorplanning of flexible chips for multi-project wafers. [Citation Graph (0, 0)][DBLP] ACM Great Lakes Symposium on VLSI, 2005, pp:494-497 [Conf]
- Meng-Chiou Wu, Rung-Bin Lin
Multiple project wafers for medium-volume IC production. [Citation Graph (0, 0)][DBLP] ISCAS (5), 2005, pp:4725-4728 [Conf]
- Meng-Chiou Wu, Rung-Bin Lin
Reticle Floorplanning and Wafer Dicing for Multiple Project Wafers. [Citation Graph (0, 0)][DBLP] ISQED, 2005, pp:610-615 [Conf]
- Meng-Chiou Wu, Rung-Bin Lin
A Comparative Study on Dicing of Multiple Project Wafers. [Citation Graph (0, 0)][DBLP] ISVLSI, 2005, pp:314-315 [Conf]
- Rung-Bin Lin, Meng-Chiou Wu
A New Statistical Approach to Timing Analysis of VLSI Circuits. [Citation Graph (0, 0)][DBLP] VLSI Design, 1998, pp:507-0 [Conf]
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