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Mukesh Ranjan :
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Huiying Yang , Mukesh Ranjan , Wim Verhaegen , Mengmeng Ding , Ranga Vemuri , Georges G. E. Gielen Efficient symbolic sensitivity analysis of analog circuits using element-coefficient diagrams. [Citation Graph (0, 0)][DBLP ] ASP-DAC, 2005, pp:230-235 [Conf ] Mukesh Ranjan , Wim Verhaegen , Anuradha Agarwal , Hemanth Sampath , Ranga Vemuri , Georges G. E. Gielen Fast, Layout-Inclusive Analog Circuit Synthesis using Pre-Compiled Parasitic-Aware Symbolic Performance Models. [Citation Graph (0, 0)][DBLP ] DATE, 2004, pp:604-609 [Conf ] Ritochit Chakraborty , Mukesh Ranjan , Ranga Vemuri Symbolic Time-Domain Behavioral and Performance Modeling of Linear Analog Circuits Using an Efficient Symbolic Newton-Iteration Algorithm for Pole Extraction. [Citation Graph (0, 0)][DBLP ] VLSI Design, 2006, pp:689-694 [Conf ] Mukesh Ranjan , Ranga Vemuri Exact hierarchical symbolic analysis of large analog networks using a general interconnection template. [Citation Graph (0, 0)][DBLP ] ISCAS, 2006, pp:- [Conf ] Search in 0.002secs, Finished in 0.002secs