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Thierry Grandpierre: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Michel Barreteau, Juliette Mattioli, Thierry Grandpierre, Christophe Lavarenne, Yves Sorel, Philippe Bonnot, Philippe Kajfasz
    PROMPT: a mapping environment for telecom applications on "system-on-a-chip". [Citation Graph (0, 0)][DBLP]
    CASES, 2000, pp:41-47 [Conf]
  2. Thierry Grandpierre, Christophe Lavarenne, Yves Sorel
    Optimized rapid prototyping for real-time embedded heterogeneous multiprocessors. [Citation Graph (0, 0)][DBLP]
    CODES, 1999, pp:74-78 [Conf]
  3. Linda Kaouane, Mohamed Akil, Thierry Grandpierre, Yves Sorel
    A Methodology to Implement Real-Time Applications on Reconfigurable Circuits. [Citation Graph (0, 0)][DBLP]
    Engineering of Reconfigurable Systems and Algorithms, 2003, pp:188-200 [Conf]
  4. Linda Kaouane, Mohamed Akil, Yves Sorel, Thierry Grandpierre
    From Algorithm Graph Specification to Automatic Synthesis of FPGA Circuit: A Seamless Flow of Graphs Transformations. [Citation Graph (0, 0)][DBLP]
    FPL, 2003, pp:934-943 [Conf]
  5. Pierre Niang, Thierry Grandpierre, Mohamed Akil, Yves Sorel
    AAA and SynDEx-Ic: A Methodology and a Software Framework for the Implementation of Real-Time Applications onto Reconfigurable Circuits. [Citation Graph (0, 0)][DBLP]
    FPL, 2004, pp:1119-1123 [Conf]
  6. Thierry Grandpierre, Yves Sorel
    From Algorithm and Architecture Specifications to Automatic Generation of Distributed Real-Time Executives: a Seamless Flow of Graphs Transformations. [Citation Graph (0, 0)][DBLP]
    MEMOCODE, 2003, pp:123-0 [Conf]
  7. Linda Kaouane, Mohamed Akil, Thierry Grandpierre, Yves Sorel
    A Methodology to Implement Real-Time Applications onto Reconfigurable Circuits. [Citation Graph (0, 0)][DBLP]
    The Journal of Supercomputing, 2004, v:30, n:3, pp:283-301 [Journal]
  8. Pierre Niang, Thierry Grandpierre, Mohamed Akil
    Implementing Real-Time Algorithms by using the AAA Prototyping Methodology. [Citation Graph (0, 0)][DBLP]
    IESS, 2007, pp:27-36 [Conf]

  9. Parallel Algorithm for Concurrent Computation of Connected Component Tree. [Citation Graph (, )][DBLP]


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