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Phillip J. Windley :
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Phillip J. Windley A Theory of Generic Interpreters. [Citation Graph (0, 0)][DBLP ] CHARME, 1993, pp:122-134 [Conf ] J. W. Gambles , Phillip J. Windley Reasoning about the VHDL Standard Logic Package Signal Data Type. [Citation Graph (0, 0)][DBLP ] CHDL, 1993, pp:123-130 [Conf ] Annette Bunker , Trent N. Larson , Michael D. Jones , Phillip J. Windley Alexandria: A Tool for Hierarchical Verification. [Citation Graph (0, 0)][DBLP ] FMCAD, 1998, pp:515-522 [Conf ] Phillip J. Windley , Jerry R. Burch Mechanically Checking a Lemma Used in an Automatic Verification Tool. [Citation Graph (0, 0)][DBLP ] FMCAD, 1996, pp:362-376 [Conf ] Paul E. Black , Phillip J. Windley Verifying Resilient Software. [Citation Graph (0, 0)][DBLP ] HICSS (5), 1997, pp:262-266 [Conf ] Paul E. Black , Phillip J. Windley Formal Verification of Secure Programs in the Presence of Side Effects. [Citation Graph (0, 0)][DBLP ] HICSS (3), 1998, pp:327-0 [Conf ] Phillip J. Windley A Hierarchical Methodology for Verifying Microprogrammed Microprocessors. [Citation Graph (0, 0)][DBLP ] IEEE Symposium on Security and Privacy, 1990, pp:345-359 [Conf ] Phillip J. Windley , Michael L. Coe A Correctness Model for Pipelined Multiprocessors. [Citation Graph (0, 0)][DBLP ] TPCD, 1994, pp:33-51 [Conf ] Mark Aagaard , Miriam Leeser , Phillip J. Windley Toward a Super Duper Hardware Tactic. [Citation Graph (0, 0)][DBLP ] HUG, 1993, pp:399-412 [Conf ] Tej Arora , Tony Leung , Karl N. Levitt , E. Thomas Schubert , Phillip J. Windley Report on the UCD Microcoded Viper Verification Project. [Citation Graph (0, 0)][DBLP ] HUG, 1993, pp:239-252 [Conf ] Paul E. Black , Phillip J. Windley Autotically Synthesized Term Denotation Predicates: A Proof Aid. [Citation Graph (0, 0)][DBLP ] TPHOLs, 1995, pp:46-57 [Conf ] Paul E. Black , Phillip J. Windley Inference Rules for Programming Languages with Side Effects in Expressions. [Citation Graph (0, 0)][DBLP ] TPHOLs, 1996, pp:51-60 [Conf ] David A. Fura , Phillip J. Windley , Arun K. Somani Abstraction Techniques for Modeling Real-World Interface Chips. [Citation Graph (0, 0)][DBLP ] HUG, 1993, pp:267-280 [Conf ] J. W. Gambles , Phillip J. Windley An HOL Theory for Logic States with Indeterminate Strengths. [Citation Graph (0, 0)][DBLP ] TPHOLs, 1991, pp:96-103 [Conf ] Kelly M. Hall , Phillip J. Windley Simulating Microprocessors from Formal Specifications. [Citation Graph (0, 0)][DBLP ] TPHOLs, 1992, pp:507-525 [Conf ] Phillip J. Windley The Practical Verification of Microprocessor Designs. [Citation Graph (0, 0)][DBLP ] TPHOLs, 1991, pp:32-37 [Conf ] Phillip J. Windley Abstract Theories in HOL. [Citation Graph (0, 0)][DBLP ] TPHOLs, 1992, pp:197-210 [Conf ] Phillip J. Windley Specifying Instruction-Set Architectures in HOL: A Primer. [Citation Graph (0, 0)][DBLP ] TPHOLs, 1994, pp:440-455 [Conf ] Phillip J. Windley Formal Modeling and Verification of Microprocessors. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1995, v:44, n:1, pp:54-72 [Journal ] Using reputation to augment explicit authorization. [Citation Graph (, )][DBLP ] Search in 0.022secs, Finished in 0.023secs