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Publications of Author

1. Iñaki Goirizelaia, Koldo Espinosa, José Luis Martín, Jesús Lázaro, Jagoba Arias, Juan J. Igarza
   An Electronic Secure Voting System Based on Automatic Paper Ballot Reading. [Citation Graph (0, 0)][DBLP]
   CIARP, 2004, pp:470-477 [Conf]
   
2. Armando Astarloa, Jesús Lázaro, Unai Bidarte, José Luis Martín, Aitzol Zuloaga
   A Self-Reconfiguration Framework for Multiprocessor CSoPCs. [Citation Graph (0, 0)][DBLP]
   FPL, 2004, pp:1124-1126 [Conf]
   
3. Jesús Lázaro, Armando Astarloa, Jagoba Arias, Unai Bidarte, Carlos Cuadrado
   High Throughput Serpent Encryption Implementation. [Citation Graph (0, 0)][DBLP]
   FPL, 2004, pp:996-1000 [Conf]
   
4. Jesús Lázaro, Jagoba Arias, José Luis Martín, Carlos Cuadrado
   Modified Fuzzy C-Means Clustering Algorithm for Real-Time Applications. [Citation Graph (0, 0)][DBLP]
   FPL, 2003, pp:1087-1090 [Conf]
   
5. Jagoba Arias, Jesús Lázaro, Aitzol Zuloaga, Jaime Jimenez
   Doppler Location Algorithm for Wireless Sensor Networks. [Citation Graph (0, 0)][DBLP]
   International Conference on Wireless Networks, 2004, pp:509-514 [Conf]
   
6. Armando Astarloa, Jesús Lázaro, Jagoba Arias, Unai Bidarte, Aitzol Zuloaga
   Co-simulation Virtual Platform for Reconfigurable Multiprocessor Hybrid Cores Development. [Citation Graph (0, 0)][DBLP]
   MSV/AMCS, 2004, pp:17-22 [Conf]
   
7. Jagoba Arias, Jesús Lázaro, Juan M. Aguirregabiria
   Basque: A Case Study in Generalizing LaTeX Language Support. [Citation Graph (0, 0)][DBLP]
   TEX, XML, and Digital Typography, 2004, pp:27-33 [Conf]
   
8. Jagoba Arias, Eduardo Santos, Itziar Marin, Jaime Jimenez, Jesús Lázaro, Aitzol Zuloaga
   Node Synchronization in Wireless Sensor Networks. [Citation Graph (0, 0)][DBLP]
   ICWMC, 2006, pp:50- [Conf]
   
9. José L. Martín-Sánchez, Aitzol Zuloaga, Carlos Cuadrado, Jesús Lázaro, Unai Bidarte
   Hardware implementation of optical flow constraint equation using FPGAs. [Citation Graph (0, 0)][DBLP]
   Computer Vision and Image Understanding, 2005, v:98, n:3, pp:462-490 [Journal]
   
10. Jesús Lázaro, Tatiana Rückschlossová, Tomasa Calvo
    Shift invariant binary aggregation operators. [Citation Graph (0, 0)][DBLP]
    Fuzzy Sets and Systems, 2004, v:142, n:1, pp:51-62 [Journal]
    
11. Jesús Lázaro, Jagoba Arias, José Luis Martín, Aitzol Zuloaga, Carlos Cuadrado
    SOM Segmentation of gray scale images for optical recognition. [Citation Graph (0, 0)][DBLP]
    Pattern Recognition Letters, 2006, v:27, n:16, pp:1991-1997 [Journal]
    
12. Armando Astarloa, Unai Bidarte, Jesús Lázaro, Aitzol Zuloaga, Jagoba Arias
    Multiprocessor SoPC-Core for FAT volume computation. [Citation Graph (0, 0)][DBLP]
    Microprocessors and Microsystems, 2005, v:29, n:10, pp:421-434 [Journal]
    
13. Jesús Lázaro, Jagoba Arias, José Luis Martín, Carlos Cuadrado, Armando Astarloa
    Implementation of a modified Fuzzy C-Means clustering algorithm for real-time applications. [Citation Graph (0, 0)][DBLP]
    Microprocessors and Microsystems, 2005, v:29, n:8-9, pp:375-380 [Journal]
    
14. Jagoba Arias, Aitzol Zuloaga, Jesús Lázaro, Jon Andreu, Armando Astarloa
    Malguki: an RSSI based ad hoc location algorithm. [Citation Graph (0, 0)][DBLP]
    Microprocessors and Microsystems, 2004, v:28, n:8, pp:403-409 [Journal]
    
15. Jagoba Arias, Jesús Lázaro, Aitzol Zuloaga, Jaime Jimenez, Armando Astarloa
    GPS-less location algorithm for wireless sensor networks. [Citation Graph (0, 0)][DBLP]
    Computer Communications, 2007, v:30, n:14-15, pp:2904-2916 [Journal]
    
16. Jesús Lázaro, Jagoba Arias, Armando Astarloa, Unai Bidarte, Aitzol Zuloaga
    Hardware architecture for a general regression neural network coprocessor. [Citation Graph (0, 0)][DBLP]
    Neurocomputing, 2007, v:71, n:1-3, pp:78-87 [Journal]
    
17. Armando Astarloa, Aitzol Zuloaga, Unai Bidarte, José Luis Martín, Jesús Lázaro, Jaime Jimenez
    Tornado: A self-reconfiguration control system for core-based multiprocessor CSoPCs. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 2007, v:53, n:9, pp:629-643 [Journal]
    
18. 
    Secure Ethernet Point-to-Point Links for Autonomous Electronic Ballot Boxes. [Citation Graph (, )][DBLP]
    
    
19. 
    DNAX-BCU: An Un-clonable Cost-conscious SoPC Implementation for Bus Coupling Units of the European Installation Bus. [Citation Graph (, )][DBLP]
    
    
20. 
    AES-Galois Counter Mode Encryption/Decryption FPGA Core for Industrial and Residential Gigabit Ethernet Communications. [Citation Graph (, )][DBLP]
    
    
21. 
    XAO Operators - The interval universe. [Citation Graph (, )][DBLP]
    
    
22. 
    PCIREX: A Fast Prototyping Platform for TMR Dynamically Reconfigurable Systems. [Citation Graph (, )][DBLP]
    
    
23. 
    Configurable-System-on-Programmable-Chip for Power Electronics Control Applications. [Citation Graph (, )][DBLP]