The SCEAS System
Navigation Menu

Journals in DBLP

IEEE Trans. Computers
1989, volume: 38, number: 3

  1. Russ Miller, Quentin F. Stout
    Mesh Computer Algorithms for Computational Geometry. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1989, v:38, n:3, pp:321-340 [Journal]
  2. John A. Stankovic
    Decentralized Decision Making for Task Reallocation in a Hard Real-Time System. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1989, v:38, n:3, pp:341-355 [Journal]
  3. Fred J. Meyer, Dhiraj K. Pradhan
    Dynamic Testing Strategy for Distributed Systems. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1989, v:38, n:3, pp:356-365 [Journal]
  4. Joseph Kljaich Jr., Brian T. Smith, Anthony S. Wojcik
    Formal Verification of Fault Tolerance Using Theorem-Proving Techniques. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1989, v:38, n:3, pp:366-376 [Journal]
  5. Andrew S. Noetzel
    An Interpolating Memory Unit for Function Evaluation: Analysis and Design. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1989, v:38, n:3, pp:377-384 [Journal]
  6. Anujan Varma, C. S. Raghavendra
    Fault-Tolerant Routing in Multistage Interconnection Networks. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1989, v:38, n:3, pp:385-393 [Journal]
  7. Pinaki Mazumder, Janak H. Patel
    Parallel Testing for Pattern-Sensitive Faults in Semiconductor Random-Access Memories. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1989, v:38, n:3, pp:394-407 [Journal]
  8. Derek L. Eager, John Zahorjan, Edward D. Lazowska
    Speedup Versus Efficiency in Parallel Systems. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1989, v:38, n:3, pp:408-423 [Journal]
  9. Bhabani P. Sinha, Pradip K. Srimani
    Fast Parallel Algorithms for Binary Multiplication and Their Implementation on Systolic Architectures. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1989, v:38, n:3, pp:424-431 [Journal]
  10. Adrian E. Conway, Edmundo de Souza e Silva, Stephen S. Lavenberg
    Mean Value Analysis by Chain of Product Form Queueing Networks. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1989, v:38, n:3, pp:432-442 [Journal]
  11. Thomas A. Rice, Leah H. Jamieson
    A Highly Parallel Algorithm for Root Extraction. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1989, v:38, n:3, pp:443-449 [Journal]
  12. Ahmed El-Amawy
    A Systolic Architecture for Fast Dense Matrix Inversion. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1989, v:38, n:3, pp:449-455 [Journal]
  13. Craig G. Prohazka
    Decoupling Link Scheduling Constraints in Multihop Packet Radio Networks. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1989, v:38, n:3, pp:455-458 [Journal]
  14. Yang-Chang Hong, Thomas H. Payne
    Parallel Sorting in a Ring Network of Processors. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1989, v:38, n:3, pp:458-464 [Journal]
  15. B. L. Bodnar, A. C. Liu
    Modeling and Performance Analysis of Single-Bus Tightly-Coupled Multiprocessors. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1989, v:38, n:3, pp:465-470 [Journal]
  16. Viktor K. Prasanna, Yu-Chen Tsai
    On Mapping Algorithms to Linear and Fault-Tolerant Systolic Arrays. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1989, v:38, n:3, pp:470-478 [Journal]
  17. Mary Ann Kennedy, Gerard G. L. Meyer
    The PMC System Level Fault Model: Cardinality Properties of the Implied Faulty Sets. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1989, v:38, n:3, pp:478-480 [Journal]
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002