Journals in DBLP
Russ Miller , Quentin F. Stout Mesh Computer Algorithms for Computational Geometry. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1989, v:38, n:3, pp:321-340 [Journal ] John A. Stankovic Decentralized Decision Making for Task Reallocation in a Hard Real-Time System. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1989, v:38, n:3, pp:341-355 [Journal ] Fred J. Meyer , Dhiraj K. Pradhan Dynamic Testing Strategy for Distributed Systems. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1989, v:38, n:3, pp:356-365 [Journal ] Joseph Kljaich Jr. , Brian T. Smith , Anthony S. Wojcik Formal Verification of Fault Tolerance Using Theorem-Proving Techniques. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1989, v:38, n:3, pp:366-376 [Journal ] Andrew S. Noetzel An Interpolating Memory Unit for Function Evaluation: Analysis and Design. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1989, v:38, n:3, pp:377-384 [Journal ] Anujan Varma , C. S. Raghavendra Fault-Tolerant Routing in Multistage Interconnection Networks. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1989, v:38, n:3, pp:385-393 [Journal ] Pinaki Mazumder , Janak H. Patel Parallel Testing for Pattern-Sensitive Faults in Semiconductor Random-Access Memories. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1989, v:38, n:3, pp:394-407 [Journal ] Derek L. Eager , John Zahorjan , Edward D. Lazowska Speedup Versus Efficiency in Parallel Systems. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1989, v:38, n:3, pp:408-423 [Journal ] Bhabani P. Sinha , Pradip K. Srimani Fast Parallel Algorithms for Binary Multiplication and Their Implementation on Systolic Architectures. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1989, v:38, n:3, pp:424-431 [Journal ] Adrian E. Conway , Edmundo de Souza e Silva , Stephen S. Lavenberg Mean Value Analysis by Chain of Product Form Queueing Networks. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1989, v:38, n:3, pp:432-442 [Journal ] Thomas A. Rice , Leah H. Jamieson A Highly Parallel Algorithm for Root Extraction. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1989, v:38, n:3, pp:443-449 [Journal ] Ahmed El-Amawy A Systolic Architecture for Fast Dense Matrix Inversion. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1989, v:38, n:3, pp:449-455 [Journal ] Craig G. Prohazka Decoupling Link Scheduling Constraints in Multihop Packet Radio Networks. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1989, v:38, n:3, pp:455-458 [Journal ] Yang-Chang Hong , Thomas H. Payne Parallel Sorting in a Ring Network of Processors. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1989, v:38, n:3, pp:458-464 [Journal ] B. L. Bodnar , A. C. Liu Modeling and Performance Analysis of Single-Bus Tightly-Coupled Multiprocessors. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1989, v:38, n:3, pp:465-470 [Journal ] Viktor K. Prasanna , Yu-Chen Tsai On Mapping Algorithms to Linear and Fault-Tolerant Systolic Arrays. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1989, v:38, n:3, pp:470-478 [Journal ] Mary Ann Kennedy , Gerard G. L. Meyer The PMC System Level Fault Model: Cardinality Properties of the Implied Faulty Sets. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1989, v:38, n:3, pp:478-480 [Journal ]