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Pablo Viana:
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- Pablo Viana, Ann Gordon-Ross, Eamonn J. Keogh, Edna Barros, Frank Vahid
Configurable cache subsetting for fast cache tuning. [Citation Graph (0, 0)][DBLP] DAC, 2006, pp:695-700 [Conf]
- Pablo Viana, Edna Barros, Sandro Rigo, Rodolfo Azevedo, Guido Araujo
Modeling and Simulating Memory Hierarchies in a Platform-Based Design Methodology. [Citation Graph (0, 0)][DBLP] DATE, 2004, pp:734-735 [Conf]
- Pablo Viana, Edna Barros, Sandro Rigo, Rodolfo Azevedo, Guido Araujo
Exploring Memory Hierarchy with ArchC. [Citation Graph (0, 0)][DBLP] SBAC-PAD, 2003, pp:2-9 [Conf]
- Ann Gordon-Ross, Pablo Viana, Frank Vahid, Walid A. Najjar, Edna Barros
A one-shot configurable-cache tuner for improved energy and performance. [Citation Graph (0, 0)][DBLP] DATE, 2007, pp:755-760 [Conf]
- Andre Silva, Guilherme Esmeraldo, Edna Barros, Pablo Viana
Cache-Analyzer: Design Space Evaluation of Configurable-Caches in a Single-Pass. [Citation Graph (0, 0)][DBLP] IEEE International Workshop on Rapid System Prototyping, 2007, pp:3-9 [Conf]
A table-based method for single-pass cache optimization. [Citation Graph (, )][DBLP]
Tuning Mechanism for Two-Level Cache Hierarchy Intended for Instruction Caches and Low Energy Consumption. [Citation Graph (, )][DBLP]
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