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Publications of Author

1. Juan Manuel Moreno, Jordi Madrenas, Joan Cabestany, E. Cantó, Rafal Kielbik, Julio Faura, Josep Maria Insenser
   Realization of Self-Repairing and Evolvable Hardware Structures by Means of Implicit Self-Configuration. [Citation Graph (0, 0)][DBLP]
   Evolvable Hardware, 1999, pp:182-187 [Conf]
   
2. Jordi Cosp, Jordi Madrenas
   A microelectronic implementation of a bioinspired analog matrix for object segmentation of a visual scene. [Citation Graph (0, 0)][DBLP]
   ESANN, 2001, pp:69-74 [Conf]
   
3. Jordi Madrenas, Jordi Cosp, Lucas Oscar, Eduard Alarcón, Eva Vidal, Gerard Villar
   BIOSEG: a bioinspired vlsi analog system for image segmentation. [Citation Graph (0, 0)][DBLP]
   ESANN, 2004, pp:411-416 [Conf]
   
4. Juan Manuel Moreno, Jordi Madrenas, Eduard Alarcón, Joan Cabestany
   Analog Sequential Architecture for Neuro-Fuzzy Models VLSI Implementation. [Citation Graph (0, 0)][DBLP]
   ICANN, 1997, pp:1199-1204 [Conf]
   
5. Juan Manuel Moreno, Jordi Madrenas, Julio Faura, E. Cantó, Joan Cabestany, Josep Maria Insenser
   Feasible Evolutionary and Self-Repairing Hardware by Means of the Dynamic Reconfiguration Capabilities of the FIPSOC Devices. [Citation Graph (0, 0)][DBLP]
   ICES, 1998, pp:345-355 [Conf]
   
6. Gerard Villar, Eduard Alarcón, Jordi Madrenas, Francesc Guinjoan, Alberto Poveda
   Energy optimization of tapered buffers for CMOS on-chip switching power converters. [Citation Graph (0, 0)][DBLP]
   ISCAS (5), 2005, pp:4453-4456 [Conf]
   
7. A. Chinea, Juan Manuel Moreno, Jordi Madrenas, Joan Cabestany
   Improving the Performance of Piecewise Linear Separation Incremental Algorithms for Practical Hardware Implementations. [Citation Graph (0, 0)][DBLP]
   IWANN, 1997, pp:607-616 [Conf]
   
8. Jordi Madrenas, Gregorio Ruiz, Juan Manuel Moreno, Joan Cabestany
   Synthesis and Optimization of a Bit-Serial Pipeline Kernel Processor. [Citation Graph (0, 0)][DBLP]
   IWANN, 1997, pp:801-810 [Conf]
   
9. Juan Manuel Moreno, Jordi Madrenas, S. San Anselmo, F. Castillo, Joan Cabestany
   Digital Hardware Implementation of ROI Incremental Algorithms. [Citation Graph (0, 0)][DBLP]
   IWANN, 1995, pp:761-770 [Conf]
   
10. Juan Manuel Moreno, Jordi Madrenas, Joan Cabestany, J. R. Laúna
    Using Classical and Evolutive Neural Models in Industrial Applications: A Case Study for an Automatic Coin Classifier. [Citation Graph (0, 0)][DBLP]
    IWANN, 1997, pp:922-931 [Conf]
    
11. Philippe Thissen, Michel Verleysen, Jean-Didier Legat, Jordi Madrenas, Jordi Domínguez
    A VLSI System for Neural Bayesian and LVQ Classification. [Citation Graph (0, 0)][DBLP]
    IWANN, 1995, pp:696-703 [Conf]
    
12. Jordi Cosp, Jordi Madrenas, Daniel Fernández
    Design and basic blocks of a neuromorphic VLSI analogue vision system. [Citation Graph (0, 0)][DBLP]
    Neurocomputing, 2006, v:69, n:16-18, pp:1962-1970 [Journal]
    
13. 
    Mismatch-tolerant CMOS oscillator and excitatory synapse for bioinspired image segmentation. [Citation Graph (, )][DBLP]
    
    
14. 
    Selective similarity function for VLSI analog signal processing. [Citation Graph (, )][DBLP]
    
    
15. 
    Exponential-enhanced characteristic of MOS transistors and its application to log-domain circuits. [Citation Graph (, )][DBLP]
    
    
16. 
    An asynchronous finite state machine controller for integrated buck-boost power converters in wideband signal-tracking applications. [Citation Graph (, )][DBLP]
    
    
17. 
    Position, damping and inertia control of parallel-plate electrostatic actuators. [Citation Graph (, )][DBLP]
    
    
18. 
    Implementation of compact VLSI FitzHugh-Nagumo neurons. [Citation Graph (, )][DBLP]
    
    
19. 
    The Perplexus bio-inspired reconfigurable circuit. [Citation Graph (, )][DBLP]
    
    
20. 
    A Novel Hardware Architecture for Self-adaptive Systems. [Citation Graph (, )][DBLP]
    
    
21. 
    JubiTool: Unified design flow for the Perplexus SIMD hardware accelerator. [Citation Graph (, )][DBLP]
    
    
22. 
    SpiNDeK: An Integrated design tool for the multiprocessor emulation of complex bioinspired spiking neural networks. [Citation Graph (, )][DBLP]
    
    
23. 
    A reconfigurable architecture for emulating large-scale bio-inspired systems. [Citation Graph (, )][DBLP]
    
    
24. 
    BAF: A Bio-Inspired Agent Framework for Distributed Pervasive Applications. [Citation Graph (, )][DBLP]
    
    
25. 
    Implementation of a Dynamic Fault-Tolerance Scaling Technique on a Self-Adaptive Hardware Architecture. [Citation Graph (, )][DBLP]
    
    
26. 
    Improving the Performance of PieceWise Linear Separation Incremental Algorithms for Practical Hardware Implementations [Citation Graph (, )][DBLP]