Conferences in DBLP
Julian F. Miller On the Filtering Properties of Evolved Gate Arrays. [Citation Graph (0, 0)][DBLP ] Conf ] Delon Levi , Steve Guccione GeneticFPGA: Evolving Stable Circuits on Mainstream FPGA Devices. [Citation Graph (0, 0)][DBLP ] Conf ] Gunnar Tufte , Pauline C. Haddow Prototyping a GA Pipeline for Complete Hardware Evolution. [Citation Graph (0, 0)][DBLP ] Conf ] Ernesto Damiani , Andrea Tettamanzi , Valentino Liberali On-Line Evolution of FPGA-Based Circuits: A Case Study on Hash Functions. [Citation Graph (0, 0)][DBLP ] Conf ] Vesselin K. Vassilev , Julian F. Miller , Terence C. Fogarty On the Nature of Two-Bit Multiplier Landscapes. [Citation Graph (0, 0)][DBLP ] Conf ] Arturo Hernández Aguirre , Bill P. Buckles , Carlos A. Coello Coello A Genetic Programming Approach to Logic Function Synthesis by Means of Multiplexers. [Citation Graph (0, 0)][DBLP ] Conf ] Tatiana Kalganova , Julian F. Miller Evolving More Efficient Digital Circuits by Allowing Circuit Layout Evolution and Multi-Objective Fitness. [Citation Graph (0, 0)][DBLP ] Conf ] Ricardo Salem Zebulum , Marco Aurélio Cavalcanti Pacheco , Marley B. R. Vellasco Artificial Evolution of Active Filters: A Case Study. [Citation Graph (0, 0)][DBLP ] Conf ] Adrian Stoica , Didier Keymeulen , Raoul Tawel , Carlos Salazar-Lazaro , Wei-te Li Evolutionary Experiments with a Fine-Grained Reconfigurable Architecture for Analog and Digital CMOS Circuits. [Citation Graph (0, 0)][DBLP ] Conf ] Paul J. Layzell Inherent Qualities of Circuits Designed by Artificial Evolution: A Preliminary Study of Populational Fault Tolerance. [Citation Graph (0, 0)][DBLP ] Conf ] Jason D. Lohn , Gary L. Haith , Silvano Colombano , Dimitris Stassinopoulos A Comparison of Dynamic Fitness Schedules for Evolutionary Design of Amplifiers. [Citation Graph (0, 0)][DBLP ] Conf ] Stuart J. Flockton , Kevin Sheehan A System for Intrinsic Evolution of Linear and Non-Linear Filters. [Citation Graph (0, 0)][DBLP ] Conf ] Hugo de Garis , Norberto Eiji Nawa , Andrzej Buller , Michael Korkin , Felix A. Gers , Michael Hough ATR's Artificial Brain ("Cam-Brain") Project a Sample of what Individual "CoDi-1Bit" Model Evolved Neural Net Modules can do with Digital and Analog I/O. [Citation Graph (0, 0)][DBLP ] Conf ] Vesselin K. Vassilev , Julian F. Miller , Terence C. Fogarty Co-Evolving Demes of Non-Uniform Cellular Automata for Synchronisation. [Citation Graph (0, 0)][DBLP ] Conf ] Cesar Ortega-Sanchez , Andrew M. Tyrrell Reliability Analysis in Self-Repairing Embryonic Systems. [Citation Graph (0, 0)][DBLP ] Conf ] Marek A. Perkowski , Alan Mishchenko , Anatoli N. Chebotarev Evolvable Hardware or Learning Hardware? Induction of State Machines from Temporal Logic Constraints. [Citation Graph (0, 0)][DBLP ] Conf ] Eric Mjolsness , Elliot M. Meyerowitz , Victoria Gor , Tobias Mann Morphogenesis in Plants: Modeling the Shoot Apical Meristem, and Possible Applications. [Citation Graph (0, 0)][DBLP ] Conf ] Peter Davis Adaptive Networks with Self-Organizing Multi-Hop Links. [Citation Graph (0, 0)][DBLP ] Conf ] Guangming Lu , Hartej Singh , Ming-Hau Lee , Nader Bagherzadeh , Fadi J. Kurdahi , Eliseu M. Chaves Filho , Vladimir Castro Alves The MorphoSys Dynamically Reconfigurable System-on-Chip. [Citation Graph (0, 0)][DBLP ] Conf ] George J. Milne A Model for Dynamic Adaptation in Reconfigurable Hardware Systems. [Citation Graph (0, 0)][DBLP ] Conf ] Reid B. Porter , Kevin McCabe , Neil W. Bergmann An Applications Approach to Evolvable Hardware. [Citation Graph (0, 0)][DBLP ] Conf ] Nicholas J. Macias The PIG Paradigm: The Design and Use of a Massively Parallel Fine Grained Self-Reconfigurable Infinitely Scalable Architecture. [Citation Graph (0, 0)][DBLP ] Conf ] Juan Manuel Moreno , Jordi Madrenas , Joan Cabestany , E. Cantó , Rafal Kielbik , Julio Faura , Josep Maria Insenser Realization of Self-Repairing and Evolvable Hardware Structures by Means of Implicit Self-Configuration. [Citation Graph (0, 0)][DBLP ] Conf ] John F. McDonald , Bryan S. Goda Reconfigurable FPGA's in the 1-20 GHz Band with HBT BiCMOS. [Citation Graph (0, 0)][DBLP ] Conf ] Koji Asari , Yukio Mitsuyama , Takao Onoye , Isao Shirakawa , Hiroshige Hirano , Toshiyuki Honda , Tatsuo Otsuki , Takaaki Baba , Teresa H. Y. Meng FeRAM Circuit Technology for System on a Chip. [Citation Graph (0, 0)][DBLP ] Conf ] William A. Crossley Optimization for Aerospace Conceptual Design through the use of Genetic Algorithms. [Citation Graph (0, 0)][DBLP ] Conf ] Jordan B. Pollack , Hod Lipson , Pablo Funes , Sevan G. Ficici , Gregory Hornby Coevolutionary Robotics. [Citation Graph (0, 0)][DBLP ] Conf ] Randy L. Haupt , J. Michael Johnson Dynamic Phase-Only Array Beam Control Using a Genetic Algorithm. [Citation Graph (0, 0)][DBLP ] Conf ] Derek S. Linden , Edward E. Altshuler Evolving Wire Antennas Using Genetic Algorithms: A Review. [Citation Graph (0, 0)][DBLP ] Conf ] Algirdas Avizienis The Hundred Year Spacecraft. [Citation Graph (0, 0)][DBLP ] Conf ] Thomas A. Cwik , Gerhard Klimeck Genetically Engineered Microelectronic Infrared Filters. [Citation Graph (0, 0)][DBLP ] Conf ] Gerhard Klimeck , Carlos Salazar-Lazaro , Adrian Stoica , Thomas A. Cwik "Genetically Engineered" Nanoelectronics. [Citation Graph (0, 0)][DBLP ] Conf ] Piet van Remortel The Evolution of ROBDDs: Preliminary Results and a First Analysis. [Citation Graph (0, 0)][DBLP ] Conf ] Jason Masner , John Cavalieri , James F. Frenzel , James A. Foster Representation and Robustness for Evolved Sorting Networks. [Citation Graph (0, 0)][DBLP ] Conf ] Prabhas Chongstitvatana , Chatchawit Aporntewan Improving Correctness of Finite-State Machine Synthesis from Multiple Partial Input/Output Sequences. [Citation Graph (0, 0)][DBLP ] Conf ] 