The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Tsuyoshi Isshiki: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Tsuyoshi Isshiki, Takenobu Shimizugashira, Akihisa Ohta, Imanuddin Amril, Hiroaki Kunieda
    FPGA for High-Performance Bit-Serial Pipeline Datapath. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 1998, pp:331-332 [Conf]
  2. Akihisa Ohta, Tsuyoshi Isshiki, Hiroaki Kunieda
    New FPGA Architecture for Bit-Serial Pipeline Datapath. [Citation Graph (0, 0)][DBLP]
    FCCM, 1998, pp:58-67 [Conf]
  3. Tsuyoshi Isshiki, Wayne Wei-Ming Dai
    High-Level Bit-Serial Datapath Synthesis for Multi-FPGA Systems. [Citation Graph (0, 0)][DBLP]
    FPGA, 1995, pp:167-173 [Conf]
  4. Tsuyoshi Isshiki, Takenobu Shimizugashira, Akihisa Ohta, Imanuddin Amril, Hiroaki Kunieda
    A New FPGA Architecture for High-Performance bit-Serial Pipeline Datapath (Abstract). [Citation Graph (0, 0)][DBLP]
    FPGA, 1998, pp:255- [Conf]
  5. Tsuyoshi Isshiki, Wayne Wei-Ming Dai
    Hight-Performance Datapath Implementation on Field-Programmable Multi-Chip Module (FPMCM). [Citation Graph (0, 0)][DBLP]
    FPL, 1994, pp:373-384 [Conf]
  6. Tsuyoshi Isshiki, Chawalit Honsawek, Trio Adiono, Kazuhito Ito, Tomohiko Ohtsuka, Dongju Li, Hiroaki Kunieda
    H.263+ Video Encoder/Decoder LSI Featuring System-MSPA Architecture and Improved Rate Control Method. [Citation Graph (0, 0)][DBLP]
    ISAS-SCI (1), 2001, pp:195-200 [Conf]
  7. Tsuyoshi Isshiki, Hiroaki Kunieda
    Efficient anti-aliasing algorithm for computer generated images. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:532-535 [Conf]
  8. Tsuyoshi Isshiki, Makoto Ishikawa, Hiroaki Kunieda
    Cost-effective shadowing method using the ED-buffer on an adaptive light cube. [Citation Graph (0, 0)][DBLP]
    The Visual Computer, 2000, v:16, n:7, pp:453-468 [Journal]

  9. MAPS: an integrated framework for MPSoC application parallelization. [Citation Graph (, )][DBLP]


  10. Trace-driven workload simulation method for Multiprocessor System-On-Chips. [Citation Graph (, )][DBLP]


  11. Cool MPSoC programming. [Citation Graph (, )][DBLP]


  12. Realization of fingerprint identification module on DSP board. [Citation Graph (, )][DBLP]


  13. Efficient method for face region quality enhancement in low bit rate video coding. [Citation Graph (, )][DBLP]


  14. High density bit-serial FPGA with LUT embedding shift register function. [Citation Graph (, )][DBLP]


  15. A new methodology for low delay real-time videophone software architecture design. [Citation Graph (, )][DBLP]


Search in 0.002secs, Finished in 0.003secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002