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Publications of Author

1. R. David Weldon, Steven S. Chang, Hong Wang, Gerolf Hoflehner, Perry H. Wang, Daniel M. Lavery, John Paul Shen
   Quantitative Evaluation of the Register Stack Engine and Optimizations for Future Itanium Processors. [Citation Graph (0, 0)][DBLP]
   Interaction between Compilers and Computer Architectures, 2002, pp:57-67 [Conf]
   
2. Alex Settle, Daniel A. Connors, Gerolf Hoflehner, Daniel M. Lavery
   Optimization for the Intel® Itanium ®Architectur Register Stack. [Citation Graph (0, 0)][DBLP]
   CGO, 2003, pp:115-124 [Conf]
   
3. Gerolf Hoflehner, Knud Kirkegaard, Rod Skinner, Daniel M. Lavery, Yong-Fong Lee, Wei Li
   Compiler Optimizations for Transaction Processing Workloads on Itanium® Linux Systems. [Citation Graph (0, 0)][DBLP]
   MICRO, 2004, pp:294-303 [Conf]
   
4. Shih-wei Liao, Perry H. Wang, Hong Wang, John Paul Shen, Gerolf Hoflehner, Daniel M. Lavery
   Post-Pass Binary Adaptation for Software-Based Speculative Precomputation. [Citation Graph (0, 0)][DBLP]
   PLDI, 2002, pp:117-128 [Conf]
   
5. Gerolf Hoflehner, Daniel M. Lavery, David C. Sehr
   The compiler as a validation and evaluation tool. [Citation Graph (0, 0)][DBLP]
   Electr. Notes Theor. Comput. Sci., 2003, v:82, n:2, pp:- [Journal]
   
6. Jay Bharadwaj, William Y. Chen, Weihaw Chuang, Gerolf Hoflehner, Kishore N. Menezes, Kalyan Muthukumar, Jim Pierce
   The Intel IA-64 Compiler Code Generator. [Citation Graph (0, 0)][DBLP]
   IEEE Micro, 2000, v:20, n:5, pp:44-53 [Journal]
   
7. Gerolf Hoflehner, Darshan Desai, Daniel M. Lavery, Alexandru Nicolau, Alexander V. Veidenbaum
   Comparative characterization of SPEC CPU2000 and CPU2006 on Itanium architecture. [Citation Graph (0, 0)][DBLP]
   SIGMETRICS, 2007, pp:361-362 [Conf]
   
8. 
   Strategies for Predicate-Aware Register Allocation. [Citation Graph (, )][DBLP]
   
   
9. 
   Performance Characterization of Itanium® 2-Based Montecito Processor. [Citation Graph (, )][DBLP]