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Jun Sawada: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Jun Sawada, Warren A. Hunt Jr.
    Trace Table Based Approach for Pipeline Microprocessor Verification. [Citation Graph (0, 0)][DBLP]
    CAV, 1997, pp:364-375 [Conf]
  2. Jun Sawada, Warren A. Hunt Jr.
    Processor Verification with Precise Exeptions and Speculative Execution. [Citation Graph (0, 0)][DBLP]
    CAV, 1998, pp:135-146 [Conf]
  3. Jun Sawada, Warren A. Hunt Jr.
    Results of the Verification of a Complex Pipelined Machine Model. [Citation Graph (0, 0)][DBLP]
    CHARME, 1999, pp:313-316 [Conf]
  4. Jun Sawada, Ruben Gamboa
    Mechanical Verification of a Square Root Algorithm Using Taylor's Theorem. [Citation Graph (0, 0)][DBLP]
    FMCAD, 2002, pp:274-291 [Conf]
  5. Jun Sawada, Warren A. Hunt Jr.
    Hardware Modeling Using Function Encapsulation. [Citation Graph (0, 0)][DBLP]
    FMCAD, 2000, pp:234-245 [Conf]
  6. Jun Sawada, Erik Reeber
    ACL2SIX: A Hint used to Integrate a Theorem Prover and an Automated Verification Tool. [Citation Graph (0, 0)][DBLP]
    FMCAD, 2006, pp:161-170 [Conf]
  7. Erik Reeber, Jun Sawada
    Combining ACL2 and an automated verification tool to verify a multiplier. [Citation Graph (0, 0)][DBLP]
    ACL2, 2006, pp:63-70 [Conf]
  8. Jun Sawada, Warren A. Hunt Jr.
    Verification of FM9801: An Out-of-Order Microprocessor Model with Speculative Execution, Exceptions, and Program-Modifying Capability. [Citation Graph (0, 0)][DBLP]
    Formal Methods in System Design, 2002, v:20, n:2, pp:187-222 [Journal]
  9. Wendy Belluomini, Damir Jamsek, Andrew K. Martin, Chandler McDowell, Robert K. Montoye, Hung C. Ngo, Jun Sawada
    Limited switch dynamic logic circuits for high-speed low-power circuit design. [Citation Graph (0, 0)][DBLP]
    IBM Journal of Research and Development, 2006, v:50, n:2-3, pp:277-286 [Journal]
  10. H. Peter Hofstee, Jun Sawada
    Derivation of a rotator circuit with homogeneous interconnect. [Citation Graph (0, 0)][DBLP]
    Inf. Process. Lett., 2001, v:77, n:2-4, pp:131-135 [Journal]

  11. Scalable conditional equivalence checking: An automated invariant-generation based approach. [Citation Graph (, )][DBLP]


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