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Publications of Author

1. Flavius Gruian, Zoran A. Salcic
   Designing a Concurrent Hardware Garbage Collector for Small Embedded Systems. [Citation Graph (0, 0)][DBLP]
   Asia-Pacific Computer Systems Architecture Conference, 2005, pp:281-294 [Conf]
   
2. Flavius Gruian, Krzysztof Kuchcinski
   LEneS: task scheduling for low-energy systems using variable supply voltage processors. [Citation Graph (0, 0)][DBLP]
   ASP-DAC, 2001, pp:449-455 [Conf]
   
3. Flavius Gruian, Krzysztof Kuchcinski
   Operation Binding and Scheduling for Low Power Using Constraint Logic Programming. [Citation Graph (0, 0)][DBLP]
   EUROMICRO, 1998, pp:10083-10090 [Conf]
   
4. Flavius Gruian, Krzysztof Kuchcinski
   Low-Energy Directed Architecture Selection and Task Scheduling for System-Level Design. [Citation Graph (0, 0)][DBLP]
   EUROMICRO, 1999, pp:1296-1302 [Conf]
   
5. Flavius Gruian
   Hard real-time scheduling for low-energy using stochastic data and DVS processors. [Citation Graph (0, 0)][DBLP]
   ISLPED, 2001, pp:46-51 [Conf]
   
6. Flavius Gruian, Krzysztof Kuchcinski
   Uncertainty-based scheduling: energy-efficient ordering for tasks with variable execution time. [Citation Graph (0, 0)][DBLP]
   ISLPED, 2003, pp:465-468 [Conf]
   
7. Flavius Gruian
   System-Level Design Methods for Low-Energy Architectures Containing Variable Voltage Processors. [Citation Graph (0, 0)][DBLP]
   PACS, 2000, pp:1-12 [Conf]
   
8. Zoran A. Salcic, Flavius Gruian, Partha S. Roop, Alif Wahid
   A Scheduler Support Unit for Reactive Microprocessors. [Citation Graph (0, 0)][DBLP]
   RTCSA, 2006, pp:368-372 [Conf]
   
9. Flavius Gruian, Per Andersson, Krzysztof Kuchcinski, Martin Schoeberl
   Automatic generation of application-specific systems based on a micro-programmed Java core. [Citation Graph (0, 0)][DBLP]
   SAC, 2005, pp:879-884 [Conf]
   
10. Flavius Gruian, Partha S. Roop, Zoran A. Salcic, Ivan Radojevic
    The SystemJ approach to system-level design. [Citation Graph (0, 0)][DBLP]
    MEMOCODE, 2006, pp:149-158 [Conf]
    
11. 
    VHDL vs. Bluespec system verilog: a case study on a Java embedded architecture. [Citation Graph (, )][DBLP]
    
    
12. 
    BluEJAMM: A Bluespec Embedded Java Architecture with Memory Management. [Citation Graph (, )][DBLP]
    
    
13. 
    BlueJEP: a flexible and high-performance Java embedded processor. [Citation Graph (, )][DBLP]
    
    
14. 
    Investigating hardware micro-instruction folding in a Java embedded processor. [Citation Graph (, )][DBLP]