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Terrence S. T. Mak:
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Publications of Author
- Terrence S. T. Mak, K. P. Lam
High Speed GAML-based Phylogenetic Tree Reconstruction Using HW/SW Codesign. [Citation Graph (0, 0)][DBLP] CSB, 2003, pp:470-473 [Conf]
- Terrence S. T. Mak, K. P. Lam
Embedded Computation of Maximum-Likelihood Phylogeny Inference Using Platform FPGA. [Citation Graph (0, 0)][DBLP] CSB, 2004, pp:512-514 [Conf]
- Terrence S. T. Mak, K. P. Lam
FPGA-Based Computation for Maximum Likelihood Phylogenetic Tree Evaluation. [Citation Graph (0, 0)][DBLP] FPL, 2004, pp:1076-1079 [Conf]
- Terrence S. T. Mak, K. P. Lam
On Computing Maximum Likelihood Phylogeny Using FPGA p. [Citation Graph (0, 0)][DBLP] FPL, 2004, pp:1188- [Conf]
- Terrence S. T. Mak, N. Pete Sedcole, Peter Y. K. Cheung, Wayne Luk
On-FPGA Communication Architectures and Design Factors. [Citation Graph (0, 0)][DBLP] FPL, 2006, pp:1-8 [Conf]
- Terrence S. T. Mak, K. P. Lam, H. S. Ng, G. Rachmuth, C.-S. Poon
A Current-Mode Analog Circuit for Reinforcement Learning Problems. [Citation Graph (0, 0)][DBLP] ISCAS, 2007, pp:1301-1304 [Conf]
- Terrence S. T. Mak, N. Pete Sedcole, Peter Y. K. Cheung, Wayne Luk, K. P. Lam
A Hybrid Analog-Digital Routing Network for NoC Dynamic Routing. [Citation Graph (0, 0)][DBLP] NOCS, 2007, pp:173-182 [Conf]
A DP-network for optimal dynamic routing in network-on-chip. [Citation Graph (, )][DBLP]
High-throughput interconnect wave-pipelining for global communication in FPGAs. [Citation Graph (, )][DBLP]
Interconnection lengths and delays estimation for communication links in FPGAs. [Citation Graph (, )][DBLP]
Global interconnections in FPGAs: modeling and performance analysis. [Citation Graph (, )][DBLP]
Implementation of Wave-Pipelined Interconnects in FPGAs. [Citation Graph (, )][DBLP]
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