Search the dblp DataBase

Publications of Author

1. Miroslav Lícko, Jan Schier, Milan Tichý, Markus Kühl
   MATLAB/Simulink Based Methodology for Rapid-FPGA-Prototyping. [Citation Graph (0, 0)][DBLP]
   FPL, 2003, pp:984-987 [Conf]
   
2. Jan Schier, Antonin Hermanek
   Using Logarithmic Arithmetic to Implement the Recursive Least Squares (QR) Algorithm in FPGA. [Citation Graph (0, 0)][DBLP]
   FPL, 2004, pp:1149-1151 [Conf]
   
3. Zdenek Pohl, Jan Schier, Miroslav Lícko, Antonin Hermanek, Milan Tichý, Rudolf Matousek, Jiri Kadlec
   Logarithmic Arithmetic for Real Data Types and Support for Matlab/Simulink Based Rapid-FPGA-Prototyping. [Citation Graph (0, 0)][DBLP]
   IPDPS, 2003, pp:190- [Conf]
   
4. Milan Tichý, Jan Schier, David Gregg
   Efficient Floating-Point Implementation of High-Order (N)LMS Adaptive Filters in FPGA. [Citation Graph (0, 0)][DBLP]
   ARC, 2006, pp:311-316 [Conf]
   
5. Premysl Sucha, Zdenek Hanzálek, Antonin Hermanek, Jan Schier
   Scheduling of Iterative Algorithms with Matrix Operations for Efficient FPGA Design - Implementation of Finite Interval Constant Modulus Algorithm. [Citation Graph (0, 0)][DBLP]
   VLSI Signal Processing, 2007, v:46, n:1, pp:35-53 [Journal]
   
6. 
   FPGA Implementation of Adaptive Filters based on GSFAP using Log Arithmetic. [Citation Graph (, )][DBLP]