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Milan Tichý:
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Publications of Author
- Zdenek Pohl, Rudolf Matousek, Jiri Kadlec, Milan Tichý, Miroslav Lícko
Lattice adaptive filter implementation for FPGA. [Citation Graph (0, 0)][DBLP] FPGA, 2003, pp:246- [Conf]
- Milan Tichý, Andy Nisbet, David Gregg
GSFAP adaptive filtering using log arithmetic for resource-constrained embedded systems. [Citation Graph (0, 0)][DBLP] FPGA, 2006, pp:236- [Conf]
- Miroslav Lícko, Jan Schier, Milan Tichý, Markus Kühl
MATLAB/Simulink Based Methodology for Rapid-FPGA-Prototyping. [Citation Graph (0, 0)][DBLP] FPL, 2003, pp:984-987 [Conf]
- Rudolf Matousek, Milan Tichý, Zdenek Pohl, Jiri Kadlec, Chris Softley, Nick Coleman
Logarithmic Number System and Floating-Point Arithmetics on FPGA. [Citation Graph (0, 0)][DBLP] FPL, 2002, pp:627-636 [Conf]
- Zdenek Pohl, Jan Schier, Miroslav Lícko, Antonin Hermanek, Milan Tichý, Rudolf Matousek, Jiri Kadlec
Logarithmic Arithmetic for Real Data Types and Support for Matlab/Simulink Based Rapid-FPGA-Prototyping. [Citation Graph (0, 0)][DBLP] IPDPS, 2003, pp:190- [Conf]
- Milan Tichý, Jan Schier, David Gregg
Efficient Floating-Point Implementation of High-Order (N)LMS Adaptive Filters in FPGA. [Citation Graph (0, 0)][DBLP] ARC, 2006, pp:311-316 [Conf]
RLS Lattice Algorithm with Order Probability Evaluation as an Accelerator for the Microblaze Processor. [Citation Graph (, )][DBLP]
FPGA Implementation of Adaptive Filters based on GSFAP using Log Arithmetic. [Citation Graph (, )][DBLP]
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